<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#0563C1" vlink="#954F72" style="word-wrap:break-word"> [AMD Official Use Only - General] <div> <div class="WordSection1"> The in_gpu_reset is set after reset error count and reset error status function call, so we can’t use amdgpu_in_reset(), please check ras->in_recovery flag.<o:p></o:p> <o:p> </o:p> Regards,<o:p></o:p> Stanley<o:p></o:p> <div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Zhou1, Tao <Tao.Zhou1@amd.com> Sent: Friday, October 13, 2023 5:06 PM To: Zhang, Hawking <Hawking.Zhang@amd.com>; amd-gfx@lists.freedesktop.org; Yang, Stanley <Stanley.Yang@amd.com>; Li, Candice <Candice.Li@amd.com>; Chai, Thomas <YiPeng.Chai@amd.com>; Wang, Yang(Kevin) <KevinYang.Wang@amd.com> Subject: Re: [PATCH 4/5] drm/amdgpu: bypass RAS error reset in some conditions<o:p></o:p> </div> </div> <o:p> </o:p> [AMD Official Use Only - General]<o:p></o:p> <o:p> </o:p> <div> <div> How about this condition:<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> if ((amdgpu_in_reset(adev) || amdgpu_ras_intr_triggered()) &&<o:p></o:p> </div> <div> mca_funcs && mca_funcs->mca_set_debug_mode)<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> I use amdgpu_in_reset to skip touching it in all gpu resets, not only for the resets triggered by ras fatal error.<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> Regards,<o:p></o:p> </div> <div> Tao<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> From: Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>> Sent: Thursday, October 12, 2023 9:14 PM To: Zhou1, Tao <<a href="mailto:Tao.Zhou1@amd.com">Tao.Zhou1@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>>; Yang, Stanley <<a href="mailto:Stanley.Yang@amd.com">Stanley.Yang@amd.com</a>>; Li, Candice <<a href="mailto:Candice.Li@amd.com">Candice.Li@amd.com</a>>; Chai, Thomas <<a href="mailto:YiPeng.Chai@amd.com">YiPeng.Chai@amd.com</a>>; Wang, Yang(Kevin) <<a href="mailto:KevinYang.Wang@amd.com">KevinYang.Wang@amd.com</a>> Subject: RE: [PATCH 4/5] drm/amdgpu: bypass RAS error reset in some conditions <o:p></o:p> <div> <o:p></o:p> </div> </div> <div> <div> <a name="BM_BEGIN"></a>[AMD Official Use Only - General] - if (!amdgpu_ras_is_supported(adev, block)) + /* skip ras error reset in gpu reset */ + if (amdgpu_in_reset(adev) && + mca_funcs && mca_funcs->mca_set_debug_mode) + return 0; We should check RAS in_recovery flag in such case. Reset domain is locked in relative late phase, at least *after* error counter harvest. Please double check. Regards, Hawking -----Original Message----- From: Zhou1, Tao <<a href="mailto:Tao.Zhou1@amd.com">Tao.Zhou1@amd.com</a>> Sent: Thursday, October 12, 2023 17:01 To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; Yang, Stanley <<a href="mailto:Stanley.Yang@amd.com">Stanley.Yang@amd.com</a>>; Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>>; Li, Candice <<a href="mailto:Candice.Li@amd.com">Candice.Li@amd.com</a>>; Chai, Thomas <<a href="mailto:YiPeng.Chai@amd.com">YiPeng.Chai@amd.com</a>>; Wang, Yang(Kevin) <<a href="mailto:KevinYang.Wang@amd.com">KevinYang.Wang@amd.com</a>> Cc: Zhou1, Tao <<a href="mailto:Tao.Zhou1@amd.com">Tao.Zhou1@amd.com</a>> Subject: [PATCH 4/5] drm/amdgpu: bypass RAS error reset in some conditions PMFW is responsible for RAS error reset in some conditions, driver can skip the operation. Signed-off-by: Tao Zhou <<a href="mailto:tao.zhou1@amd.com">tao.zhou1@amd.com</a>> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 91ed4fd96ee1..6dddb0423411 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -1105,11 +1105,18 @@ int amdgpu_ras_reset_error_count(struct amdgpu_device *adev, enum amdgpu_ras_block block) { struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0); + const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs; if (!block_obj || !block_obj->hw_ops) return 0; - if (!amdgpu_ras_is_supported(adev, block)) + /* skip ras error reset in gpu reset */ + if (amdgpu_in_reset(adev) && + mca_funcs && mca_funcs->mca_set_debug_mode) + return 0; + + if (!amdgpu_ras_is_supported(adev, block) || + !amdgpu_ras_get_mca_debug_mode(adev)) return 0; if (block_obj->hw_ops->reset_ras_error_count) @@ -1122,6 +1129,7 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device *adev, enum amdgpu_ras_block block) { struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, block, 0); + const struct amdgpu_mca_smu_funcs *mca_funcs = adev->mca.mca_funcs; if (!block_obj || !block_obj->hw_ops) { dev_dbg_once(adev->dev, "%s doesn't config RAS function\n", @@ -1129,7 +1137,13 @@ int amdgpu_ras_reset_error_status(struct amdgpu_device *adev, return 0; } - if (!amdgpu_ras_is_supported(adev, block)) + /* skip ras error reset in gpu reset */ + if (amdgpu_in_reset(adev) && + mca_funcs && mca_funcs->mca_set_debug_mode) + return 0; + + if (!amdgpu_ras_is_supported(adev, block) || + !amdgpu_ras_get_mca_debug_mode(adev)) return 0; if (block_obj->hw_ops->reset_ras_error_count) -- 2.35.1<o:p></o:p> </div> </div> </div> </div> </div> </div> </body> </html>