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[AMD Official Use Only - General]<br>
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Yes, those regs are restricted to PF writes. I should update the commit message</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Dhume, Samir <Samir.Dhume@amd.com><br>
<b>Sent:</b> Wednesday, November 8, 2023 9:54 AM<br>
<b>To:</b> Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> RE: [PATCH] drm/amdgpu: Do not program HDP_MISC_CNTL in hdp_v4_0.c under SRIOV</font>
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<div><font size="2"><span style="font-size:11pt;">[AMD Official Use Only - General]<br>
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Do you also need to skip programming of mmHDP_NONSURFACE_BASE and mmHDP_NONSURFACE_BASE_HI?<br>
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-----Original Message-----<br>
From: Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu@amd.com><br>
Sent: Tuesday, November 7, 2023 2:32 PM<br>
To: amd-gfx@lists.freedesktop.org<br>
Cc: Dhume, Samir <Samir.Dhume@amd.com>; Lu, Victor Cheng Chi (Victor) <VictorChengChi.Lu@amd.com><br>
Subject: [PATCH] drm/amdgpu: Do not program HDP_MISC_CNTL in hdp_v4_0.c under SRIOV<br>
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This register is blocked for VF access.<br>
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Signed-off-by: Victor Lu <victorchengchi.lu@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c | 5 +++++<br>
1 file changed, 5 insertions(+)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c<br>
index 3f3a6445c006..bf3bdf67abb7 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c<br>
@@ -145,6 +145,11 @@ static void hdp_v4_0_init_registers(struct amdgpu_device *adev)<br>
break;<br>
}<br>
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+ /* Do not program registers if VF */<br>
+ if (amdgpu_sriov_vf(adev)) {<br>
+ return;<br>
+ }<br>
+<br>
WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1);<br>
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if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 0))<br>
--<br>
2.34.1<br>
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