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<div dir="ltr">You try to add one new interface to inform mes about the context flush after driver side finish process termination , from my understanding, mes already know the process context need to be purged after all the related queues been removed even
without this notification. What do you expect mes to do about this context flush flag ? Mes should block this process context for next set_sched command? Mes can achieve this by ignore the set_sched command with trap disable parameter on an invalid process
context .</div>
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<div dir="ltr">Shaoyun.liu</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kim, Jonathan <Jonathan.Kim@amd.com><br>
<b>Sent:</b> Tuesday, December 12, 2023 8:19:09 PM<br>
<b>To:</b> Liu, Shaoyun <Shaoyun.Liu@amd.com>; Huang, JinHuiEric <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish <Harish.Kasiviswanathan@amd.com><br>
<b>Subject:</b> RE: [PATCH] drm/amdkfd: fix mes set shader debugger process management</font>
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<div><font size="2"><span style="font-size:11pt;">[Public]<br>
<br>
> -----Original Message-----<br>
> From: Liu, Shaoyun <Shaoyun.Liu@amd.com><br>
> Sent: Tuesday, December 12, 2023 7:08 PM<br>
> To: Kim, Jonathan <Jonathan.Kim@amd.com>; Huang, JinHuiEric<br>
> <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> <Harish.Kasiviswanathan@amd.com><br>
> Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> management<br>
><br>
> [Public]<br>
><br>
> I see, so the problem is after process context , set_shader been called with<br>
> disable parameter, do you know the reason why MES re-added the<br>
> process context into the list ?<br>
<br>
Because MES has no idea what disable means.<br>
<br>
All it knows is that without the flush flag, set_shader should update the necessary per-VMID (process) registers as requested by the driver, which requires persistent per-process HW settings so that potential future waves can inherit those settings i.e. ADD_QUEUE.skip_process_ctx_clear
is set (why ADD_QUEUE auto clears the process context otherwise is another long story, basically an unsolvable MES cache bug problem).<br>
<br>
Common use case example:<br>
add_queue -> set_shader call either transiently stalls the SPI per-VMID or transiently dequeues the HWS per-VMID depending on the request settings -> fulfils the per-VMID register write updates -> resumes process queues so that potential waves on those queues
inherit new debug settings.<br>
<br>
You can't do this kind of operation at the queue level alone.<br>
<br>
The problem that this patch solves (along with the MES FW upgrade) is an unfortunate quirk of having to operate between process (debug requests) and queue space (non-debug requests).<br>
Old HWS used to operate at the per-process level via MAP_PROCESS so it was a lot easier to balance debug versus non-debug requests back then (but it was also lot less efficient performance wise).<br>
<br>
Jon<br>
<br>
><br>
> Shaoyun.liu<br>
><br>
> -----Original Message-----<br>
> From: Kim, Jonathan <Jonathan.Kim@amd.com><br>
> Sent: Tuesday, December 12, 2023 6:07 PM<br>
> To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; Huang, JinHuiEric<br>
> <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> <Harish.Kasiviswanathan@amd.com><br>
> Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> management<br>
><br>
> [Public]<br>
><br>
> > -----Original Message-----<br>
> > From: Liu, Shaoyun <Shaoyun.Liu@amd.com><br>
> > Sent: Tuesday, December 12, 2023 5:44 PM<br>
> > To: Kim, Jonathan <Jonathan.Kim@amd.com>; Huang, JinHuiEric<br>
> > <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > <Harish.Kasiviswanathan@amd.com><br>
> > Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> > management<br>
> ><br>
> > [Public]<br>
> ><br>
> > Do you mean SET_SHADER_DEBUGER can be called before ADD_QUEUE ?<br>
> I<br>
> > think even in that situation MES should still be able to handle it<br>
> > as long as MES already remove the process context from its list , MES<br>
> > will treat the process context as a new item. I still don't understand why<br>
> MES haven't<br>
> > purged the process context from the list after process termination . Will<br>
> > debug queue itself also use the add/remove queue interface and is<br>
> > it possible the debug queue itself from the old process still not be<br>
> > removed ?<br>
><br>
> SET_SHADER_DEBUGGER can be called independently from ADD_QUEUE.<br>
> The process list is updated on either on SET_SHADER_DEBUGGER or<br>
> ADD_QUEUE.<br>
> e.g. runtime_enable (set_shader) -> add_queue -> remove_queue (list<br>
> purged) -> runtime_disable (set_shader process re-added) -> process<br>
> termination (stale list) or debug attach (set_shader) -> add_queue -><br>
> remove_queue (list purged) -> debug detach (set_shader process re-added) -<br>
> >process termination (stale list)<br>
><br>
> MES has no idea what process termination means. The new flag is a proxy<br>
> for this.<br>
> There are reasons for process settings to take place prior to queue add<br>
> (debugger, gfx11 cwsr workaround, core dump etc need this).<br>
><br>
> I'm not sure what kernel/debug queues have to do with this.<br>
> By that argument, the list should be purged.<br>
><br>
> Jon<br>
><br>
> ><br>
> > Shaoyun.liu<br>
> ><br>
> > -----Original Message-----<br>
> > From: Kim, Jonathan <Jonathan.Kim@amd.com><br>
> > Sent: Tuesday, December 12, 2023 4:48 PM<br>
> > To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; Huang, JinHuiEric<br>
> > <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > <Harish.Kasiviswanathan@amd.com><br>
> > Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> > management<br>
> ><br>
> > [Public]<br>
> ><br>
> > > -----Original Message-----<br>
> > > From: Liu, Shaoyun <Shaoyun.Liu@amd.com><br>
> > > Sent: Tuesday, December 12, 2023 4:45 PM<br>
> > > To: Kim, Jonathan <Jonathan.Kim@amd.com>; Huang, JinHuiEric<br>
> > > <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> > > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > > <Harish.Kasiviswanathan@amd.com><br>
> > > Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> > > management<br>
> > ><br>
> > > [Public]<br>
> > ><br>
> > > Shouldn't the driver side remove all the remaining queues for the<br>
> > > process during process termination ? If all the queues been<br>
> > > removed for the process , MES should purge the process context<br>
> > > automatically , otherwise it's bug inside MES .<br>
> ><br>
> > That's only if there were queues added to begin with.<br>
> ><br>
> > Jon<br>
> ><br>
> > ><br>
> > > Regard<br>
> > > Sshaoyun.liu<br>
> > ><br>
> > > -----Original Message-----<br>
> > > From: Kim, Jonathan <Jonathan.Kim@amd.com><br>
> > > Sent: Tuesday, December 12, 2023 4:33 PM<br>
> > > To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; Huang, JinHuiEric<br>
> > > <JinHuiEric.Huang@amd.com>; amd-gfx@lists.freedesktop.org<br>
> > > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > > <Harish.Kasiviswanathan@amd.com><br>
> > > Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process<br>
> > > management<br>
> > ><br>
> > > [Public]<br>
> > ><br>
> > > > -----Original Message-----<br>
> > > > From: Liu, Shaoyun <Shaoyun.Liu@amd.com><br>
> > > > Sent: Tuesday, December 12, 2023 4:00 PM<br>
> > > > To: Huang, JinHuiEric <JinHuiEric.Huang@amd.com>; Kim, Jonathan<br>
> > > > <Jonathan.Kim@amd.com>; amd-gfx@lists.freedesktop.org<br>
> > > > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > > > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > > > <Harish.Kasiviswanathan@amd.com><br>
> > > > Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger<br>
> > > > process management<br>
> > > ><br>
> > > > [AMD Official Use Only - General]<br>
> > > ><br>
> > > > Does this requires the new MES FW for this process_ctx_flush<br>
> > > > requirement ? Can driver side add logic to guaranty when call<br>
> > > > SET_SHADER_DEBUGGER, the process address is always valid ?<br>
> > ><br>
> > > Call to flush on old fw is a NOP so it's harmless in that case.<br>
> > > Full solution will still require a new MES version as this is a<br>
> > > workaround on corner cases and not a new feature i.e. we can't stop<br>
> > > ROCm from running on old fw.<br>
> > > The process address is always valid from the driver side. It's the<br>
> > > MES side of things that gets stale as mentioned in the description<br>
> > > (passed value to MES is reused with new BO but MES doesn't refresh).<br>
> > > i.e. MES auto refreshes it's process list assuming process queues<br>
> > > were all drained but driver can't guarantee that<br>
> SET_SHADER_DEBUGGER<br>
> > (which<br>
> > > adds to MES's process list) will get called after queues get added<br>
> > > (in fact it's a requirements that it can be called at any time).<br>
> > > We can attempt to defer calls these calls in the KFD, considering all<br>
> cases.<br>
> > > But that would be a large shift in debugger/runtime_enable/KFD code,<br>
> > > which is already complicated and could get buggy plus it would not<br>
> > > be intuitive at all as to why we're doing this.<br>
> > > I think a single flag set to flush MES on process termination is a<br>
> > > simpler compromise that shows the limitation in a more obvious way.<br>
> > ><br>
> > > Thanks,<br>
> > ><br>
> > > Jon<br>
> > ><br>
> > ><br>
> > > ><br>
> > > > Regards<br>
> > > > Shaoyun.liu<br>
> > > ><br>
> > > ><br>
> > > > -----Original Message-----<br>
> > > > From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of<br>
> > > > Eric Huang<br>
> > > > Sent: Tuesday, December 12, 2023 12:49 PM<br>
> > > > To: Kim, Jonathan <Jonathan.Kim@amd.com>; amd-<br>
> > > > gfx@lists.freedesktop.org<br>
> > > > Cc: Wong, Alice <Shiwei.Wong@amd.com>; Kuehling, Felix<br>
> > > > <Felix.Kuehling@amd.com>; Kasiviswanathan, Harish<br>
> > > > <Harish.Kasiviswanathan@amd.com><br>
> > > > Subject: Re: [PATCH] drm/amdkfd: fix mes set shader debugger<br>
> > > > process management<br>
> > > ><br>
> > > ><br>
> > > > On 2023-12-11 16:16, Jonathan Kim wrote:<br>
> > > > > MES provides the driver a call to explicitly flush stale process<br>
> > > > > memory within the MES to avoid a race condition that results in<br>
> > > > > a fatal memory violation.<br>
> > > > ><br>
> > > > > When SET_SHADER_DEBUGGER is called, the driver passes a memory<br>
> > > > address<br>
> > > > > that represents a process context address MES uses to keep track<br>
> > > > > of future per-process calls.<br>
> > > > ><br>
> > > > > Normally, MES will purge its process context list when the last<br>
> > > > > queue has been removed. The driver, however, can call<br>
> > > > > SET_SHADER_DEBUGGER regardless of whether a queue has been<br>
> > added<br>
> > > or not.<br>
> > > > ><br>
> > > > > If SET_SHADER_DEBUGGER has been called with no queues as the<br>
> > > > > last call prior to process termination, the passed process<br>
> > > > > context address will still reside within MES.<br>
> > > > ><br>
> > > > > On a new process call to SET_SHADER_DEBUGGER, the driver may<br>
> end<br>
> > > up<br>
> > > > > passing an identical process context address value (based on<br>
> > > > > per-process gpu memory address) to MES but is now pointing to a<br>
> > > > > new allocated buffer object during KFD process creation. Since<br>
> > > > > the MES is unaware of this, access of the passed address points<br>
> > > > > to the stale object within MES and triggers a fatal memory violation.<br>
> > > > ><br>
> > > > > The solution is for KFD to explicitly flush the process context<br>
> > > > > address from MES on process termination.<br>
> > > > ><br>
> > > > > Note that the flush call and the MES debugger calls use the same<br>
> > > > > MES interface but are separated as KFD calls to avoid<br>
> > > > > conflicting with each other.<br>
> > > > ><br>
> > > > > Signed-off-by: Jonathan Kim <jonathan.kim@amd.com><br>
> > > > > Tested-by: Alice Wong <shiwei.wong@amd.com><br>
> > > > Reviewed-by: Eric Huang <jinhuieric.huang@amd.com><br>
> > > > > ---<br>
> > > > > drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 31<br>
> > > > +++++++++++++++++++<br>
> > > > > drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 10 +++---<br>
> > > > > .../amd/amdkfd/kfd_process_queue_manager.c | 1 +<br>
> > > > > drivers/gpu/drm/amd/include/mes_v11_api_def.h | 3 +-<br>
> > > > > 4 files changed, 40 insertions(+), 5 deletions(-)<br>
> > > > ><br>
> > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
> > > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
> > > > > index e544b823abf6..e98de23250dc 100644<br>
> > > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
> > > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
> > > > > @@ -916,6 +916,11 @@ int<br>
> > amdgpu_mes_set_shader_debugger(struct<br>
> > > > amdgpu_device *adev,<br>
> > > > > op_input.op = MES_MISC_OP_SET_SHADER_DEBUGGER;<br>
> > > > > op_input.set_shader_debugger.process_context_addr =<br>
> > > > process_context_addr;<br>
> > > > > op_input.set_shader_debugger.flags.u32all = flags;<br>
> > > > > +<br>
> > > > > + /* use amdgpu mes_flush_shader_debugger instead */<br>
> > > > > + if (op_input.set_shader_debugger.flags.process_ctx_flush)<br>
> > > > > + return -EINVAL;<br>
> > > > > +<br>
> > > > > op_input.set_shader_debugger.spi_gdbg_per_vmid_cntl =<br>
> > > > spi_gdbg_per_vmid_cntl;<br>
> > > > > memcpy(op_input.set_shader_debugger.tcp_watch_cntl,<br>
> > > > tcp_watch_cntl,<br>
> > > > ><br>
> > > > > sizeof(op_input.set_shader_debugger.tcp_watch_cntl));<br>
> > > > > @@ -935,6 +940,32 @@ int<br>
> > amdgpu_mes_set_shader_debugger(struct<br>
> > > > amdgpu_device *adev,<br>
> > > > > return r;<br>
> > > > > }<br>
> > > > ><br>
> > > > > +int amdgpu_mes_flush_shader_debugger(struct amdgpu_device<br>
> > *adev,<br>
> > > > > + uint64_t process_context_addr) {<br>
> > > > > + struct mes_misc_op_input op_input = {0};<br>
> > > > > + int r;<br>
> > > > > +<br>
> > > > > + if (!adev->mes.funcs->misc_op) {<br>
> > > > > + DRM_ERROR("mes flush shader debugger is not<br>
> > supported!\n");<br>
> > > > > + return -EINVAL;<br>
> > > > > + }<br>
> > > > > +<br>
> > > > > + op_input.op = MES_MISC_OP_SET_SHADER_DEBUGGER;<br>
> > > > > + op_input.set_shader_debugger.process_context_addr =<br>
> > > > process_context_addr;<br>
> > > > > + op_input.set_shader_debugger.flags.process_ctx_flush =<br>
> > > > > + true;<br>
> > > > > +<br>
> > > > > + amdgpu_mes_lock(&adev->mes);<br>
> > > > > +<br>
> > > > > + r = adev->mes.funcs->misc_op(&adev->mes, &op_input);<br>
> > > > > + if (r)<br>
> > > > > + DRM_ERROR("failed to set_shader_debugger\n");<br>
> > > > > +<br>
> > > > > + amdgpu_mes_unlock(&adev->mes);<br>
> > > > > +<br>
> > > > > + return r;<br>
> > > > > +}<br>
> > > > > +<br>
> > > > > static void<br>
> > > > > amdgpu_mes_ring_to_queue_props(struct amdgpu_device *adev,<br>
> > > > > struct amdgpu_ring *ring, diff<br>
> > > > > --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
> > > > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
> > > > > index 894b9b133000..7d4f93fea937 100644<br>
> > > > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
> > > > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
> > > > > @@ -296,9 +296,10 @@ struct mes_misc_op_input {<br>
> > > > > uint64_t process_context_addr;<br>
> > > > > union {<br>
> > > > > struct {<br>
> > > > > - uint64_t single_memop : 1;<br>
> > > > > - uint64_t single_alu_op : 1;<br>
> > > > > - uint64_t reserved: 30;<br>
> > > > > + uint32_t single_memop : 1;<br>
> > > > > + uint32_t single_alu_op : 1;<br>
> > > > > + uint32_t reserved: 29;<br>
> > > > > + uint32_t process_ctx_flush:<br>
> > > > > + 1;<br>
> > > > > };<br>
> > > > > uint32_t u32all;<br>
> > > > > } flags;<br>
> > > > > @@ -374,7 +375,8 @@ int<br>
> amdgpu_mes_set_shader_debugger(struct<br>
> > > > amdgpu_device *adev,<br>
> > > > > const uint32_t *tcp_watch_cntl,<br>
> > > > > uint32_t flags,<br>
> > > > > bool trap_en);<br>
> > > > > -<br>
> > > > > +int amdgpu_mes_flush_shader_debugger(struct amdgpu_device<br>
> > *adev,<br>
> > > > > + uint64_t process_context_addr);<br>
> > > > > int amdgpu_mes_add_ring(struct amdgpu_device *adev, int<br>
> gang_id,<br>
> > > > > int queue_type, int idx,<br>
> > > > > struct amdgpu_mes_ctx_data *ctx_data, diff<br>
> > > > > --git a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c<br>
> > > > > b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c<br>
> > > > > index 77f493262e05..8e55e78fce4e 100644<br>
> > > > > --- a/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c<br>
> > > > > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c<br>
> > > > > @@ -87,6 +87,7 @@ void kfd_process_dequeue_from_device(struct<br>
> > > > kfd_process_device *pdd)<br>
> > > > > return;<br>
> > > > ><br>
> > > > > dev->dqm->ops.process_termination(dev->dqm, &pdd->qpd);<br>
> > > > > + amdgpu_mes_flush_shader_debugger(dev->adev, pdd-<br>
> > > > >proc_ctx_gpu_addr);<br>
> > > > > pdd->already_dequeued = true;<br>
> > > > > }<br>
> > > > ><br>
> > > > > diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h<br>
> > > > > b/drivers/gpu/drm/amd/include/mes_v11_api_def.h<br>
> > > > > index 1fbfd1aa987e..ec5b9ab67c5e 100644<br>
> > > > > --- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h<br>
> > > > > +++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h<br>
> > > > > @@ -572,7 +572,8 @@ struct SET_SHADER_DEBUGGER {<br>
> > > > > struct {<br>
> > > > > uint32_t single_memop : 1; /*<br>
> > > > > SQ_DEBUG.single_memop<br>
> > > */<br>
> > > > > uint32_t single_alu_op : 1; /* SQ_DEBUG.single_alu_op<br>
> */<br>
> > > > > - uint32_t reserved : 30;<br>
> > > > > + uint32_t reserved : 29;<br>
> > > > > + uint32_t process_ctx_flush : 1;<br>
> > > > > };<br>
> > > > > uint32_t u32all;<br>
> > > > > } flags;<br>
> > > ><br>
> > ><br>
> > ><br>
> ><br>
> ><br>
><br>
><br>
<br>
</span></font></div>
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