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[AMD Official Use Only - General]<br>
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<div dir="auto">Gentle reminder</div>
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<div dir="auto">Regards</div>
<div dir="auto">Sunil</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Sunil Khatri <sunil.khatri@amd.com><br>
<b>Sent:</b> Tuesday, March 12, 2024 6:11:48 PM<br>
<b>To:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Sharma, Shashank <Shashank.Sharma@amd.com><br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; dri-devel@lists.freedesktop.org <dri-devel@lists.freedesktop.org>; linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>; Khatri, Sunil <Sunil.Khatri@amd.com><br>
<b>Subject:</b> [PATCH 2/2] drm:amdgpu: add firmware information of all IP's</font>
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<div class="PlainText">Add firmware version information of each<br>
IP and each instance where applicable.<br>
<br>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c | 122 ++++++++++++++++++++++<br>
 1 file changed, 122 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c<br>
index 611fdb90a1fc..78ddc58aef67 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c<br>
@@ -168,6 +168,123 @@ void amdgpu_coredump(struct amdgpu_device *adev, bool vram_lost,<br>
 {<br>
 }<br>
 #else<br>
+static void amdgpu_devcoredump_fw_info(struct amdgpu_device *adev, struct drm_printer *p)<br>
+{<br>
+       uint32_t version;<br>
+       uint32_t feature;<br>
+       uint8_t smu_program, smu_major, smu_minor, smu_debug;<br>
+<br>
+       drm_printf(p, "VCE feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->vce.fb_version, adev->vce.fw_version);<br>
+       drm_printf(p, "UVD feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->uvd.fw_version);<br>
+       drm_printf(p, "GMC feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->gmc.fw_version);<br>
+       drm_printf(p, "ME feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.me_feature_version, adev->gfx.me_fw_version);<br>
+       drm_printf(p, "PFP feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.pfp_feature_version, adev->gfx.pfp_fw_version);<br>
+       drm_printf(p, "CE feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.ce_feature_version, adev->gfx.ce_fw_version);<br>
+       drm_printf(p, "RLC feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlc_feature_version, adev->gfx.rlc_fw_version);<br>
+<br>
+       drm_printf(p, "RLC SRLC feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlc_srlc_feature_version,<br>
+                  adev->gfx.rlc_srlc_fw_version);<br>
+       drm_printf(p, "RLC SRLG feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlc_srlg_feature_version,<br>
+                  adev->gfx.rlc_srlg_fw_version);<br>
+       drm_printf(p, "RLC SRLS feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlc_srls_feature_version,<br>
+                  adev->gfx.rlc_srls_fw_version);<br>
+       drm_printf(p, "RLCP feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlcp_ucode_feature_version,<br>
+                  adev->gfx.rlcp_ucode_version);<br>
+       drm_printf(p, "RLCV feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.rlcv_ucode_feature_version,<br>
+                  adev->gfx.rlcv_ucode_version);<br>
+       drm_printf(p, "MEC feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->gfx.mec_feature_version,<br>
+                  adev->gfx.mec_fw_version);<br>
+<br>
+       if (adev->gfx.mec2_fw)<br>
+               drm_printf(p,<br>
+                          "MEC2 feature version: %u, fw version: 0x%08x\n",<br>
+                          adev->gfx.mec2_feature_version,<br>
+                          adev->gfx.mec2_fw_version);<br>
+<br>
+       drm_printf(p, "IMU feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->gfx.imu_fw_version);<br>
+       drm_printf(p, "PSP SOS feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->psp.sos.feature_version,<br>
+                  adev->psp.sos.fw_version);<br>
+       drm_printf(p, "PSP ASD feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->psp.asd_context.bin_desc.feature_version,<br>
+                  adev->psp.asd_context.bin_desc.fw_version);<br>
+<br>
+       drm_printf(p, "TA XGMI feature version: 0x%08x, fw version: 0x%08x\n",<br>
+                  adev->psp.xgmi_context.context.bin_desc.feature_version,<br>
+                  adev->psp.xgmi_context.context.bin_desc.fw_version);<br>
+       drm_printf(p, "TA RAS feature version: 0x%08x, fw version: 0x%08x\n",<br>
+                  adev->psp.ras_context.context.bin_desc.feature_version,<br>
+                  adev->psp.ras_context.context.bin_desc.fw_version);<br>
+       drm_printf(p, "TA HDCP feature version: 0x%08x, fw version: 0x%08x\n",<br>
+                  adev->psp.hdcp_context.context.bin_desc.feature_version,<br>
+                  adev->psp.hdcp_context.context.bin_desc.fw_version);<br>
+       drm_printf(p, "TA DTM feature version: 0x%08x, fw version: 0x%08x\n",<br>
+                  adev->psp.dtm_context.context.bin_desc.feature_version,<br>
+                  adev->psp.dtm_context.context.bin_desc.fw_version);<br>
+       drm_printf(p, "TA RAP feature version: 0x%08x, fw version: 0x%08x\n",<br>
+                  adev->psp.rap_context.context.bin_desc.feature_version,<br>
+                  adev->psp.rap_context.context.bin_desc.fw_version);<br>
+       drm_printf(p, "TA SECURE DISPLAY feature version: 0x%08x, fw version: 0x%08x\n",<br>
+               adev->psp.securedisplay_context.context.bin_desc.feature_version,<br>
+               adev->psp.securedisplay_context.context.bin_desc.fw_version);<br>
+<br>
+       /* SMC firmware */<br>
+       version = adev->pm.fw_version;<br>
+<br>
+       smu_program = (version >> 24) & 0xff;<br>
+       smu_major = (version >> 16) & 0xff;<br>
+       smu_minor = (version >> 8) & 0xff;<br>
+       smu_debug = (version >> 0) & 0xff;<br>
+       drm_printf(p, "SMC feature version: %u, program: %d, fw version: 0x%08x (%d.%d.%d)\n",<br>
+                  0, smu_program, version, smu_major, smu_minor, smu_debug);<br>
+<br>
+       /* SDMA firmware */<br>
+       for (int i = 0; i < adev->sdma.num_instances; i++) {<br>
+               drm_printf(p, "SDMA%d feature version: %u, firmware version: 0x%08x\n",<br>
+                          i, adev->sdma.instance[i].feature_version,<br>
+                          adev->sdma.instance[i].fw_version);<br>
+       }<br>
+<br>
+       drm_printf(p, "VCN feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->vcn.fw_version);<br>
+       drm_printf(p, "DMCU feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->dm.dmcu_fw_version);<br>
+       drm_printf(p, "DMCUB feature version: %u, fw version: 0x%08x\n",<br>
+                  0, adev->dm.dmcub_fw_version);<br>
+       drm_printf(p, "PSP TOC feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->psp.toc.feature_version, adev->psp.toc.fw_version);<br>
+<br>
+       version = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK;<br>
+       feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK)<br>
+                                       >> AMDGPU_MES_FEAT_VERSION_SHIFT;<br>
+       drm_printf(p, "MES_KIQ feature version: %u, fw version: 0x%08x\n",<br>
+                  feature, version);<br>
+<br>
+       version = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK;<br>
+       feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK)<br>
+                                       >> AMDGPU_MES_FEAT_VERSION_SHIFT;<br>
+       drm_printf(p, "MES feature version: %u, fw version: 0x%08x\n",<br>
+                  feature, version);<br>
+<br>
+       drm_printf(p, "VPE feature version: %u, fw version: 0x%08x\n",<br>
+                  adev->vpe.feature_version, adev->vpe.fw_version);<br>
+<br>
+}<br>
+<br>
 static ssize_t<br>
 amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,<br>
                         void *data, size_t datalen)<br>
@@ -215,6 +332,11 @@ amdgpu_devcoredump_read(char *buffer, loff_t offset, size_t count,<br>
                 }<br>
         }<br>
 <br>
+       if (coredump->adev) {<br>
+               drm_printf(&p, "IP Firmwares\n");<br>
+               amdgpu_devcoredump_fw_info(coredump->adev, &p);<br>
+       }<br>
+<br>
         if (coredump->ring) {<br>
                 drm_printf(&p, "\nRing timed out details\n");<br>
                 drm_printf(&p, "IP Type: %d Ring Name: %s\n",<br>
-- <br>
2.34.1<br>
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