<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="blue" vlink="purple" style="word-wrap:break-word"> <p style="font-family:Calibri;font-size:10pt;color:#008000;margin:5pt;font-style:normal;font-weight:normal;text-decoration:none;" align="Left"> [Public]<br> </p> <br> <div> <div class="WordSection1"> <p class="MsoNormal">The radeon driver does not support atomic modesetting. It was largely written before atomic existed. Converting it to atomic would be a substantial undertaking that would potentially regress a lot of really old chips. Radeon supports hardware that is 25+ years old at this point. <o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <p class="MsoNormal">Alex<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> <p class="MsoNormal"><b>From:</b> Mauro Rossi <issor.oruam@gmail.com> <br> <b>Sent:</b> Friday, May 17, 2024 7:28 AM<br> <b>To:</b> amd-gfx list <amd-gfx@lists.freedesktop.org><br> <b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; lee@kernel.org; Michael Goffioul <michael.goffioul@gmail.com>; Jon West <electrikjesus@gmail.com>; youling 257 <youling257@gmail.com><br> <b>Subject:</b> Re: Request for Information on the current drm radeon Atomic Mode Settings<o:p></o:p></p> </div> </div> <p class="MsoNormal"><o:p> </o:p></p> <div> <div> <p class="MsoNormal">Cc: correct email address of Lee Jones, just For Your Information<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Updated [2] link URL because HWC3 in Celadon was moved to project Celadon drm-hwcomposer local branch on yesterday<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">The request for information on drm radeon atomic modesettings is confirmed<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Mauro<o:p></o:p></p> </div> <p class="MsoNormal"><o:p> </o:p></p> <div> <div> <p class="MsoNormal">On Fri, May 17, 2024 at 8:31 AM Mauro Rossi <<a href="mailto:issor.oruam@gmail.com">issor.oruam@gmail.com</a>> wrote:<o:p></o:p></p> </div> <blockquote style="border:none;border-left:solid #CCCCCC 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in"> <div> <p class="MsoNormal">Hi all,<o:p></o:p></p> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">with Android 14 QPR2 there were substantial changes in graphic stack's Android HAL (Hardware Abstraction Layer),<o:p></o:p></p> </div> <div> <p class="MsoNormal">essentially it became mandatory that hwcomposer HAL module supports AIDL Android Interface Definition Language,<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">at the moment drm_hwcomposer does not support AIDL [1]<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Project Celadon has an HWC3 AIDL implemented [2], <s>as a patch on top of hardware/interface AOSP project, there is an opportunity to use it also for non Intel GPUs.</s><o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">drm amdpu in kernel already supports ADF Atomic Display Framework, I would like to ask the current status of Atomic Display Framework in drm radeon, because Atomic Mode Settings seems partially implemented since 2010-2012, but ADF capabilities are not exposed to user space. <o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Please, I also need some basic (high level) information about the outstanding changes that would be required to support it, in order to be able to use HWC3 -> drm_hwcomposer with r600, r300 chipsets.<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Thanks for your informations<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">Mauro<o:p></o:p></p> </div> <div> <p class="MsoNormal">android-x86 team/Bliss-OS community<o:p></o:p></p> </div> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">[1] <a href="https://gitlab.freedesktop.org/drm-hwcomposer/drm-hwcomposer/-/issues/80" target="_blank"> https://gitlab.freedesktop.org/drm-hwcomposer/drm-hwcomposer/-/issues/80</a><o:p></o:p></p> </div> <div> <p class="MsoNormal"><s>[2] <a href="https://github.com/projectceladon/vendor-intel-utils/blob/master/aosp_diff/preliminary/hardware/interfaces/11_0001-Enable-graphics.composer3-AIDL-HAL-service.patch" target="_blank">https://github.com/projectceladon/vendor-intel-utils/blob/master/aosp_diff/preliminary/hardware/interfaces/11_0001-Enable-graphics.composer3-AIDL-HAL-service.patch</a></s><o:p></o:p></p> </div> </div> </blockquote> <div> <p class="MsoNormal"><o:p> </o:p></p> </div> <div> <p class="MsoNormal">[2] <a href="https://github.com/projectceladon/drm-hwcomposer/commit/1160cdfb53daebf59f3704ec9586c66385e63747">https://github.com/projectceladon/drm-hwcomposer/commit/1160cdfb53daebf59f3704ec9586c66385e63747</a><o:p></o:p></p> </div> </div> </div> </div> </div> </div> </body> </html>