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[AMD Official Use Only - AMD Internal Distribution Only]<br>
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<div dir="auto">Reviewed-by: Vignesh.Chander@amd.com </div>
<div dir="auto">Verified-by: Vignesh.Chander@amd.com </div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Lijo Lazar <lijo.lazar@amd.com><br>
<b>Sent:</b> Tuesday, September 24, 2024 2:02:49 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Chander, Vignesh <Vignesh.Chander@amd.com><br>
<b>Subject:</b> [PATCH 1/2] drm/amdgpu: Fetch NPS mode for GCv9.4.3 VFs</font>
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<div class="PlainText">Use the memory ranges published in discovery table to deduce NPS mode<br>
of GC v9.4.3 VFs.<br>
<br>
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 12 +++++-----<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h |  2 +-<br>
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   | 30 +++++++++++++++++++++++--<br>
 3 files changed, 36 insertions(+), 8 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c<br>
index 011fe3a847d0..4d8d229ca457 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c<br>
@@ -1256,14 +1256,14 @@ void amdgpu_gmc_sysfs_fini(struct amdgpu_device *adev)<br>
 <br>
 int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,<br>
                                  struct amdgpu_mem_partition_info *mem_ranges,<br>
-                                int exp_ranges)<br>
+                                uint8_t *exp_ranges)<br>
 {<br>
         struct amdgpu_gmc_memrange *ranges;<br>
         int range_cnt, ret, i, j;<br>
         uint32_t nps_type;<br>
         bool refresh;<br>
 <br>
-       if (!mem_ranges)<br>
+       if (!mem_ranges || !exp_ranges)<br>
                 return -EINVAL;<br>
 <br>
         refresh = (adev->init_lvl->level != AMDGPU_INIT_LEVEL_MINIMAL_XGMI) &&<br>
@@ -1277,16 +1277,16 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,<br>
         /* TODO: For now, expect ranges and partition count to be the same.<br>
          * Adjust if there are holes expected in any NPS domain.<br>
          */<br>
-       if (range_cnt != exp_ranges) {<br>
+       if (*exp_ranges && (range_cnt != *exp_ranges)) {<br>
                 dev_warn(<br>
                         adev->dev,<br>
                         "NPS config mismatch - expected ranges: %d discovery - nps mode: %d, nps ranges: %d",<br>
-                       exp_ranges, nps_type, range_cnt);<br>
+                       *exp_ranges, nps_type, range_cnt);<br>
                 ret = -EINVAL;<br>
                 goto err;<br>
         }<br>
 <br>
-       for (i = 0; i < exp_ranges; ++i) {<br>
+       for (i = 0; i < range_cnt; ++i) {<br>
                 if (ranges[i].base_address >= ranges[i].limit_address) {<br>
                         dev_warn(<br>
                                 adev->dev,<br>
@@ -1327,6 +1327,8 @@ int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,<br>
                         ranges[i].limit_address - ranges[i].base_address + 1;<br>
         }<br>
 <br>
+       if (!*exp_ranges)<br>
+               *exp_ranges = range_cnt;<br>
 err:<br>
         kfree(ranges);<br>
 <br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h<br>
index d4cd247fe574..94cb4f94f43d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h<br>
@@ -467,7 +467,7 @@ void amdgpu_gmc_sysfs_fini(struct amdgpu_device *adev);<br>
 <br>
 int amdgpu_gmc_get_nps_memranges(struct amdgpu_device *adev,<br>
                                  struct amdgpu_mem_partition_info *mem_ranges,<br>
-                                int exp_ranges);<br>
+                                uint8_t *exp_ranges);<br>
 <br>
 int amdgpu_gmc_request_memory_partition(struct amdgpu_device *adev,<br>
                                         int nps_mode);<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br>
index 6a95402985ef..eb82d78c4512 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c<br>
@@ -1386,11 +1386,30 @@ gmc_v9_0_get_memory_partition(struct amdgpu_device *adev, u32 *supp_modes)<br>
         return mode;<br>
 }<br>
 <br>
+static enum amdgpu_memory_partition<br>
+gmc_v9_0_query_vf_memory_partition(struct amdgpu_device *adev)<br>
+{<br>
+       switch (adev->gmc.num_mem_partitions) {<br>
+       case 0:<br>
+               return UNKNOWN_MEMORY_PARTITION_MODE;<br>
+       case 1:<br>
+               return AMDGPU_NPS1_PARTITION_MODE;<br>
+       case 2:<br>
+               return AMDGPU_NPS2_PARTITION_MODE;<br>
+       case 4:<br>
+               return AMDGPU_NPS4_PARTITION_MODE;<br>
+       default:<br>
+               return AMDGPU_NPS1_PARTITION_MODE;<br>
+       }<br>
+<br>
+       return AMDGPU_NPS1_PARTITION_MODE;<br>
+}<br>
+<br>
 static enum amdgpu_memory_partition<br>
 gmc_v9_0_query_memory_partition(struct amdgpu_device *adev)<br>
 {<br>
         if (amdgpu_sriov_vf(adev))<br>
-               return AMDGPU_NPS1_PARTITION_MODE;<br>
+               return gmc_v9_0_query_vf_memory_partition(adev);<br>
 <br>
         return gmc_v9_0_get_memory_partition(adev, NULL);<br>
 }<br>
@@ -1935,6 +1954,8 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,<br>
 <br>
         switch (mode) {<br>
         case UNKNOWN_MEMORY_PARTITION_MODE:<br>
+               adev->gmc.num_mem_partitions = 0;<br>
+               break;<br>
         case AMDGPU_NPS1_PARTITION_MODE:<br>
                 adev->gmc.num_mem_partitions = 1;<br>
                 break;<br>
@@ -1954,7 +1975,7 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,<br>
 <br>
         /* Use NPS range info, if populated */<br>
         r = amdgpu_gmc_get_nps_memranges(adev, mem_ranges,<br>
-                                        adev->gmc.num_mem_partitions);<br>
+                                        &adev->gmc.num_mem_partitions);<br>
         if (!r) {<br>
                 l = 0;<br>
                 for (i = 1; i < adev->gmc.num_mem_partitions; ++i) {<br>
@@ -1964,6 +1985,11 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev,<br>
                 }<br>
 <br>
         } else {<br>
+               if (!adev->gmc.num_mem_partitions) {<br>
+                       dev_err(adev->dev,<br>
+                               "Not able to detect NPS mode, fall back to NPS1");<br>
+                       adev->gmc.num_mem_partitions = 1;<br>
+               }<br>
                 /* Fallback to sw based calculation */<br>
                 size = (adev->gmc.real_vram_size + SZ_16M) >> AMDGPU_GPU_PAGE_SHIFT;<br>
                 size /= adev->gmc.num_mem_partitions;<br>
-- <br>
2.25.1<br>
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