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<div class="moz-cite-prefix">Jay,</div>
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<div class="moz-cite-prefix">Got it, thanks for confirming.</div>
<div class="moz-cite-prefix"><br>
</div>
<div class="moz-cite-prefix">Thanks,</div>
<div class="moz-cite-prefix"><br>
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<div class="moz-cite-prefix">On 10/16/2024 08:13, Pillai, Aurabindo
wrote:<br>
</div>
<blockquote type="cite" cite="mid:CH0PR12MB528426EDBC0B3AC7245202578B462@CH0PR12MB5284.namprd12.prod.outlook.com">
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[Public]<br>
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<br>
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<br>
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<div id="Signature" class="elementToProof" style="color: inherit;"><span style="font-family: Aptos, Aptos_EmbeddedFont, Aptos_MSFontService, Calibri, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">Hi
Mario,</span></div>
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<br>
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Hamza is working on the reported issue and appears to be due
to a different root cause. Hence, we're expecting that the fix
for that issue is likely going to be different, with what we
know so far. While that issue is being debugged, this patch
will allow us to have better idle power consumption on dGPUs<br>
<br>
</div>
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<br>
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--</div>
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<br>
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Regards,</div>
<div class="elementToProof" style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Jay<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Limonciello, Mario
<a class="moz-txt-link-rfc2396E" href="mailto:Mario.Limonciello@amd.com"><Mario.Limonciello@amd.com></a><br>
<b>Sent:</b> Tuesday, October 15, 2024 9:14 AM<br>
<b>To:</b> Lin, Wayne <a class="moz-txt-link-rfc2396E" href="mailto:Wayne.Lin@amd.com"><Wayne.Lin@amd.com></a>;
<a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Wentland, Harry <a class="moz-txt-link-rfc2396E" href="mailto:Harry.Wentland@amd.com"><Harry.Wentland@amd.com></a>;
Li, Sun peng (Leo) <a class="moz-txt-link-rfc2396E" href="mailto:Sunpeng.Li@amd.com"><Sunpeng.Li@amd.com></a>; Siqueira,
Rodrigo <a class="moz-txt-link-rfc2396E" href="mailto:Rodrigo.Siqueira@amd.com"><Rodrigo.Siqueira@amd.com></a>; Mahfooz, Hamza
<a class="moz-txt-link-rfc2396E" href="mailto:Hamza.Mahfooz@amd.com"><Hamza.Mahfooz@amd.com></a>; Pillai, Aurabindo
<a class="moz-txt-link-rfc2396E" href="mailto:Aurabindo.Pillai@amd.com"><Aurabindo.Pillai@amd.com></a>; Li, Roman
<a class="moz-txt-link-rfc2396E" href="mailto:Roman.Li@amd.com"><Roman.Li@amd.com></a>; Chung, ChiaHsuan (Tom)
<a class="moz-txt-link-rfc2396E" href="mailto:ChiaHsuan.Chung@amd.com"><ChiaHsuan.Chung@amd.com></a>; Zuo, Jerry
<a class="moz-txt-link-rfc2396E" href="mailto:Jerry.Zuo@amd.com"><Jerry.Zuo@amd.com></a>; Mohamed, Zaeem
<a class="moz-txt-link-rfc2396E" href="mailto:Zaeem.Mohamed@amd.com"><Zaeem.Mohamed@amd.com></a>; Chiu, Solomon
<a class="moz-txt-link-rfc2396E" href="mailto:Solomon.Chiu@amd.com"><Solomon.Chiu@amd.com></a>; Wheeler, Daniel
<a class="moz-txt-link-rfc2396E" href="mailto:Daniel.Wheeler@amd.com"><Daniel.Wheeler@amd.com></a>; Deucher, Alexander
<a class="moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"><Alexander.Deucher@amd.com></a>; <a class="moz-txt-link-abbreviated" href="mailto:stable@vger.kernel.org">stable@vger.kernel.org</a>
<a class="moz-txt-link-rfc2396E" href="mailto:stable@vger.kernel.org"><stable@vger.kernel.org></a><br>
<b>Subject:</b> Re: [PATCH 01/10] drm/amd/display: temp w/a
for dGPU to enter idle optimizations</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">On 10/15/2024 03:17, Wayne Lin
wrote:<br>
> From: Aurabindo Pillai
<a class="moz-txt-link-rfc2396E" href="mailto:aurabindo.pillai@amd.com"><aurabindo.pillai@amd.com></a><br>
> <br>
> [Why&How]<br>
> vblank immediate disable currently does not work
for all asics. On<br>
> DCN401, the vblank interrupts never stop coming,
and hence we never<br>
> get a chance to trigger idle optimizations.<br>
> <br>
> Add a workaround to enable immediate disable only
on APUs for now. This<br>
> adds a 2-frame delay for triggering idle
optimization, which is a<br>
> negligible overhead.<br>
> <br>
> Fixes: db11e20a1144 ("drm/amd/display: use a more
lax vblank enable policy for older ASICs")<br>
> Fixes: 6dfb3a42a914 ("drm/amd/display: use a more
lax vblank enable policy for DCN35+")<br>
> <br>
> Cc: Mario Limonciello
<a class="moz-txt-link-rfc2396E" href="mailto:mario.limonciello@amd.com"><mario.limonciello@amd.com></a><br>
> Cc: Alex Deucher <a class="moz-txt-link-rfc2396E" href="mailto:alexander.deucher@amd.com"><alexander.deucher@amd.com></a><br>
> Cc: <a class="moz-txt-link-abbreviated" href="mailto:stable@vger.kernel.org">stable@vger.kernel.org</a><br>
> Reviewed-by: Harry Wentland
<a class="moz-txt-link-rfc2396E" href="mailto:harry.wentland@amd.com"><harry.wentland@amd.com></a><br>
> Reviewed-by: Rodrigo Siqueira
<a class="moz-txt-link-rfc2396E" href="mailto:rodrigo.siqueira@amd.com"><rodrigo.siqueira@amd.com></a><br>
> Signed-off-by: Aurabindo Pillai
<a class="moz-txt-link-rfc2396E" href="mailto:aurabindo.pillai@amd.com"><aurabindo.pillai@amd.com></a><br>
> Signed-off-by: Wayne Lin <a class="moz-txt-link-rfc2396E" href="mailto:wayne.lin@amd.com"><wayne.lin@amd.com></a><br>
> ---<br>
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
| 3 ++-<br>
> 1 file changed, 2 insertions(+), 1 deletion(-)<br>
> <br>
> diff --git
a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> index a4882b16ace2..6ea54eb5d68d 100644<br>
> ---
a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> +++
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> @@ -8379,7 +8379,8 @@ static void
manage_dm_interrupts(struct amdgpu_device *adev,<br>
> if (amdgpu_ip_version(adev,
DCE_HWIP, 0) <<br>
> IP_VERSION(3, 5, 0) ||<br>
>
acrtc_state->stream->link->psr_settings.psr_version
<<br>
> - DC_PSR_VERSION_UNSUPPORTED) {<br>
> + DC_PSR_VERSION_UNSUPPORTED ||<br>
> + !(adev->flags &
AMD_IS_APU)) {<br>
> timing =
&acrtc_state->stream->timing;<br>
> <br>
> /* at least 2 frames */<br>
<br>
Considering the regression raised [1] is on an APU too I
wonder if this <br>
is really the best workaround to approach to this issue.<br>
<br>
<a href="https://lore.kernel.org/amd-gfx/9b80e957-f20a-4bd7-a40b-2b5f1decf5a4@johnrowley.me/" moz-do-not-send="true" class="moz-txt-link-freetext">https://lore.kernel.org/amd-gfx/9b80e957-f20a-4bd7-a40b-2b5f1decf5a4@johnrowley.me/</a><br>
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