<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=Windows-1252"> </head> <body> <p style="font-family:Calibri;font-size:10pt;color:#0000FF;margin:5pt;font-style:normal;font-weight:normal;text-decoration:none;" align="Left"> [AMD Official Use Only - AMD Internal Distribution Only]<br> </p> <br> <div> <div> <div dir="ltr"> <div dir="ltr">I think I should make it more clear. When mes is been used , no matter its pipe0 or pipe1 , we expected both set_hw_resource and set_hw_resource_1 been called, that's requirement for mes_v12 and later . For none unified mes config, the pipe1 will not use mes, so no mes api is required for pipe1, but for pipe0, it's still the same requirement. </div> <div dir="ltr"><br> </div> <div dir="ltr">Regards</div> <div dir="ltr">Shaoyun.liu</div> </div> </div> <div id="ms-outlook-mobile-signature"> <div><br> </div> Get <a href="https://aka.ms/o0ukef">Outlook for iOS</a></div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Liu, Shaoyun<br> <b>Sent:</b> Friday, February 14, 2025 12:46:27 PM<br> <b>To:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br> <b>Subject:</b> RE: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once</font> <div> </div> </div> <style>  </style> <div lang="EN-US" link="#467886" vlink="purple" style="word-wrap:break-word"> <div class="x_WordSection1"> <p class="x_MsoNormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif">Oh, you right. It’s only for unified MES , for none-unified , it will still use the kiq from CP directly on pipe1 . So there is no MES API for it at all . It’s my fault . please ignore my previous comments . Your current change for this serials is good enough. </span></p> <p class="x_MsoNormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif"> </span></p> <p class="x_MsoNormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif">Regards</span></p> <p class="x_MsoNormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif">Shaoyun.liu </span></p> <p class="x_MsoNormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif"> </span></p> <div> <div style="border:none; border-top:solid #E1E1E1 1.0pt; padding:3.0pt 0in 0in 0in"> <p class="x_MsoNormal"><b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif"> Deucher, Alexander <Alexander.Deucher@amd.com> <br> <b>Sent:</b> Friday, February 14, 2025 12:42 PM<br> <b>To:</b> Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org<br> <b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once</span></p> </div> </div> <p class="x_MsoNormal"> </p> <p style="margin:5.0pt"><span style="font-size:10.0pt; font-family:"Calibri",sans-serif; color:blue">[AMD Official Use Only - AMD Internal Distribution Only]</span></p> <p class="x_MsoNormal"> </p> <div> <div> <p class="x_MsoNormal"><span style="color:black">Does it matter which pipe we use for these packets?</span></p> </div> <div> <p class="x_MsoNormal"><span style="color:black"> </span></p> </div> <div> <p class="x_MsoNormal"><span style="color:black">Alex</span></p> </div> <div> <p class="x_MsoNormal"><span style="color:black"> </span></p> </div> <div class="x_MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="x_divRplyFwdMsg"> <p class="x_MsoNormal"><b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif; color:black">From:</span></b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif; color:black"> Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>><br> <b>Sent:</b> Friday, February 14, 2025 12:36 PM<br> <b>To:</b> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br> <b>Subject:</b> RE: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once</span> </p> <div> <p class="x_MsoNormal"> </p> </div> </div> <div> <p style="margin:5.0pt"><span style="font-size:10.0pt; font-family:"Calibri",sans-serif; color:blue">[AMD Official Use Only - AMD Internal Distribution Only]</span></p> <p class="x_MsoNormal"> </p> <div> <div> <p class="x_xmsonormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif">Ok . From MES point of view , we expecting both set_hw_resource and set_hw_resource_1 been called all the time. </span></p> <p class="x_xmsonormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif"> </span></p> <p class="x_xmsonormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif">Reviewed-by: Shaoyun.liu <<a href="mailto:Shaoyun.liu@amd.com">Shaoyun.liu@amd.com</a>></span></p> <p class="x_xmsonormal"><span style="font-size:11.0pt; font-family:"Arial",sans-serif"> </span></p> <div> <div style="border:none; border-top:solid #E1E1E1 1.0pt; padding:3.0pt 0in 0in 0in"> <p class="x_xmsonormal"><b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif"> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>> <br> <b>Sent:</b> Friday, February 14, 2025 11:53 AM<br> <b>To:</b> Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br> <b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once</span></p> </div> </div> <p class="x_xmsonormal"> </p> <p style="margin:5.0pt"><span style="font-size:10.0pt; font-family:"Calibri",sans-serif; color:blue">[AMD Official Use Only - AMD Internal Distribution Only]</span></p> <p class="x_xmsonormal"> </p> <div> <div> <p class="x_xmsonormal"><span style="color:black">I can add that as a follow up patch as I don't want to change the current behavior to avoid a potential regression. Should we submit both the resource and resource_1 packets all the time?</span></p> </div> <div> <p class="x_xmsonormal"><span style="color:black"> </span></p> </div> <div> <p class="x_xmsonormal"><span style="color:black">Thanks,</span></p> </div> <div> <p class="x_xmsonormal"><span style="color:black"> </span></p> </div> <div> <p class="x_xmsonormal"><span style="color:black">Alex</span></p> </div> <div> <p class="x_xmsonormal"><span style="color:black"> </span></p> </div> <div class="x_MsoNormal" align="center" style="text-align:center"> <hr size="1" width="98%" align="center"> </div> <div id="x_x_divRplyFwdMsg"> <p class="x_xmsonormal"><b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif; color:black">From:</span></b><span style="font-size:11.0pt; font-family:"Calibri",sans-serif; color:black"> Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>><br> <b>Sent:</b> Friday, February 14, 2025 11:45 AM<br> <b>To:</b> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br> <b>Cc:</b> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>><br> <b>Subject:</b> RE: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once</span> </p> <div> <p class="x_xmsonormal"> </p> </div> </div> <div> <div> <p class="x_xmsonormal" style="margin-bottom:12.0pt"><a name="x_x_BM_BEGIN"></a><span style="font-size:11.0pt; font-family:"Times New Roman",serif">[AMD Official Use Only - AMD Internal Distribution Only]<br> <br> I'd suggest remove the enable_uni_mes check, set_hw_resource_1 is always required for gfx12 and up. Especially after add the cleaner_shader_fence_addr there.<br> <br> Regards<br> Shaoyun.liu<br> <br> -----Original Message-----<br> From: amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>> On Behalf Of Alex Deucher<br> Sent: Friday, February 14, 2025 10:19 AM<br> To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br> Cc: Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>><br> Subject: [PATCH 2/2] drm/amdgpu/mes12: allocate hw_resource_1 buffer once<br> <br> Allocate the buffer at sw init time so we don't alloc and free it for every suspend/resume or reset cycle.<br> <br> Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 39 +++++++++++++-------------<br> 1 file changed, 19 insertions(+), 20 deletions(-)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br> index 8dbab3834d82d..6db88584dd529 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br> @@ -678,9 +678,6 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes,<br> <br> static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe) {<br> - unsigned int alloc_size = AMDGPU_GPU_PAGE_SIZE;<br> - int ret = 0;<br> - struct amdgpu_device *adev = mes->adev;<br> union MESAPI_SET_HW_RESOURCES_1 mes_set_hw_res_1_pkt;<br> <br> memset(&mes_set_hw_res_1_pkt, 0, sizeof(mes_set_hw_res_1_pkt)); @@ -689,17 +686,6 @@ static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe)<br> mes_set_hw_res_1_pkt.header.opcode = MES_SCH_API_SET_HW_RSRC_1;<br> mes_set_hw_res_1_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;<br> mes_set_hw_res_1_pkt.mes_kiq_unmap_timeout = 0xa;<br> -<br> - ret = amdgpu_bo_create_kernel(adev, alloc_size, PAGE_SIZE,<br> - AMDGPU_GEM_DOMAIN_VRAM,<br> - &mes->resource_1,<br> - &mes->resource_1_gpu_addr,<br> - &mes->resource_1_addr);<br> - if (ret) {<br> - dev_err(adev->dev, "(%d) failed to create mes resource_1 bo\n", ret);<br> - return ret;<br> - }<br> -<br> mes_set_hw_res_1_pkt.cleaner_shader_fence_mc_addr =<br> mes->resource_1_gpu_addr;<br> <br> @@ -1550,6 +1536,20 @@ static int mes_v12_0_sw_init(struct amdgpu_ip_block *ip_block)<br> return r;<br> }<br> <br> + if (adev->enable_uni_mes) {<br> + int ret;<br> +<br> + ret = amdgpu_bo_create_kernel(adev, AMDGPU_GPU_PAGE_SIZE, PAGE_SIZE,<br> + AMDGPU_GEM_DOMAIN_VRAM,<br> + &adev->mes.resource_1,<br> + &adev->mes.resource_1_gpu_addr,<br> + &adev->mes.resource_1_addr);<br> + if (ret) {<br> + dev_err(adev->dev, "(%d) failed to create mes resource_1 bo\n", ret);<br> + return ret;<br> + }<br> + }<br> +<br> return 0;<br> }<br> <br> @@ -1558,6 +1558,11 @@ static int mes_v12_0_sw_fini(struct amdgpu_ip_block *ip_block)<br> struct amdgpu_device *adev = ip_block->adev;<br> int pipe;<br> <br> + if (adev->enable_uni_mes)<br> + amdgpu_bo_free_kernel(&adev->mes.resource_1,<br> + &adev->mes.resource_1_gpu_addr,<br> + &adev->mes.resource_1_addr);<br> +<br> for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {<br> kfree(adev->mes.mqd_backup[pipe]);<br> <br> @@ -1786,12 +1791,6 @@ static int mes_v12_0_hw_init(struct amdgpu_ip_block *ip_block)<br> <br> static int mes_v12_0_hw_fini(struct amdgpu_ip_block *ip_block) {<br> - struct amdgpu_device *adev = ip_block->adev;<br> -<br> - if (adev->enable_uni_mes)<br> - amdgpu_bo_free_kernel(&adev->mes.resource_1,<br> - &adev->mes.resource_1_gpu_addr,<br> - &adev->mes.resource_1_addr);<br> return 0;<br> }<br> <br> --<br> 2.48.1</span></p> </div> </div> </div> </div> </div> </div> </div> </div> </div> </div> </body> </html>