<div dir="ltr"><div>Adding it into drm_amdgpu_info_device with a DRM version bump is better.</div><div> </div><div>Marek</div></div> <div class="gmail_quote gmail_quote_container"><div dir="ltr" class="gmail_attr">On Fri, Mar 21, 2025 at 4:54 PM Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>> wrote: </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">I can move it into device_info if that's better. Alex On Fri, Mar 21, 2025 at 3:42 PM Marek Olšák <<a href="mailto:maraeo@gmail.com" target="_blank">maraeo@gmail.com</a>> wrote: > > This is not in device_info, but it'll do. > > Reviewed-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com" target="_blank">marek.olsak@amd.com</a>> > > Marek > > On Mon, Mar 17, 2025 at 5:38 PM Alex Deucher <<a href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>> wrote: >> >> Add an INFO query to check if user queues are supported. >> >> v2: switch to a mask of IPs (Marek) >> >> Cc: <a href="mailto:marek.olsak@amd.com" target="_blank">marek.olsak@amd.com</a> >> Cc: <a href="mailto:prike.liang@amd.com" target="_blank">prike.liang@amd.com</a> >> Cc: <a href="mailto:sunil.khatri@amd.com" target="_blank">sunil.khatri@amd.com</a> >> Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>> >> --- >> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 13 +++++++++++++ >> include/uapi/drm/amdgpu_drm.h | 8 ++++++++ >> 2 files changed, 21 insertions(+) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >> index 3b7dfd56ccd0e..1d683c0487697 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >> @@ -1340,6 +1340,19 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) >> return -EINVAL; >> } >> } >> + case AMDGPU_INFO_UQ_SUPPORTED: { >> + struct drm_amdgpu_info_uq_supported uq_supported = {}; >> + >> + if (adev->userq_funcs[AMDGPU_HW_IP_GFX]) >> + uq_supported.supported |= (1 << AMDGPU_HW_IP_GFX); >> + if (adev->userq_funcs[AMDGPU_HW_IP_COMPUTE]) >> + uq_supported.supported |= (1 << AMDGPU_HW_IP_COMPUTE); >> + if (adev->userq_funcs[AMDGPU_HW_IP_DMA]) >> + uq_supported.supported |= (1 << AMDGPU_HW_IP_DMA); >> + ret = copy_to_user(out, &uq_supported, >> + min((size_t)size, sizeof(uq_supported))) ? -EFAULT : 0; >> + return 0; >> + } >> default: >> DRM_DEBUG_KMS("Invalid request %d\n", info->query); >> return -EINVAL; >> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h >> index 5dbd9037afe75..4b64e91002c05 100644 >> --- a/include/uapi/drm/amdgpu_drm.h >> +++ b/include/uapi/drm/amdgpu_drm.h >> @@ -1195,6 +1195,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow { >> #define AMDGPU_INFO_GPUVM_FAULT 0x23 >> /* query FW object size and alignment */ >> #define AMDGPU_INFO_UQ_FW_AREAS 0x24 >> +/* query if user queues are supported */ >> +#define AMDGPU_INFO_UQ_SUPPORTED 0x25 >> >> #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0 >> #define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff >> @@ -1572,6 +1574,12 @@ struct drm_amdgpu_info_uq_metadata { >> }; >> }; >> >> +struct drm_amdgpu_info_uq_supported { >> + /** returns a mask for each IP type (1 << AMDGPU_HW_IP_*) */ >> + __u32 supported; >> + __u32 pad; >> +}; >> + >> /* >> * Supported GPU families >> */ >> -- >> 2.48.1 >> </blockquote></div>