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[AMD Official Use Only - AMD Internal Distribution Only]<br>
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Reviewed-by: Michael Chen <michael.chen@amd.com></div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Sent:</b> Tuesday, April 29, 2025 3:30 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Chen, Michael <Michael.Chen@amd.com>; Liu, Shaoyun <Shaoyun.Liu@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu/mes: use correct MES pipe for resets</font>
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<div class="PlainText">Use the KIQ pipe for kernel queues and the SCHED pipe for<br>
user queues.<br>
<br>
Fixes: a82b069d9eae ("drm/amdgpu/mes: consolidate on a single mes reset callback")<br>
Cc: Michael Chen <Michael.Chen@amd.com><br>
Cc: Shaoyun Liu <Shaoyun.Liu@amd.com><br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 1 +<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 1 +<br>
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +-<br>
3 files changed, 3 insertions(+), 1 deletion(-)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
index 5de0d6c528f4e..2febb63ab2322 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c<br>
@@ -349,6 +349,7 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,<br>
queue_input.wptr_addr = ring->wptr_gpu_addr;<br>
queue_input.vmid = vmid;<br>
queue_input.use_mmio = use_mmio;<br>
+ queue_input.is_kq = true;<br>
if (ring->funcs->type == AMDGPU_RING_TYPE_GFX)<br>
queue_input.legacy_gfx = true;<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
index e98b0d892a593..a41f65b4f733a 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
@@ -277,6 +277,7 @@ struct mes_reset_queue_input {<br>
uint64_t wptr_addr;<br>
uint32_t vmid;<br>
bool legacy_gfx;<br>
+ bool is_kq;<br>
};<br>
<br>
enum mes_misc_opcode {<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br>
index f9f2fbc0a7166..b4f17332d4664 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c<br>
@@ -869,7 +869,7 @@ static int mes_v12_0_reset_hw_queue(struct amdgpu_mes *mes,<br>
mes_reset_queue_pkt.doorbell_offset = input->doorbell_offset;<br>
}<br>
<br>
- if (mes->adev->enable_uni_mes)<br>
+ if (input->is_kq)<br>
pipe = AMDGPU_MES_KIQ_PIPE;<br>
else<br>
pipe = AMDGPU_MES_SCHED_PIPE;<br>
-- <br>
2.49.0<br>
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