<html xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=Windows-1252"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="en-CN" link="#467886" vlink="#96607D" style="word-wrap:break-word"> [AMD Official Use Only - AMD Internal Distribution Only] <div> <div class="WordSection1"> Hi <a id="OWAAM9777098A1C45D44DAAA7EEFF1F8C6305" href="mailto:Christian.Koenig@amd.com"> @Koenig, Christian</a> and <a id="OWAAMF184118DAD54A4429B35D20D9CFA1F2D" href="mailto:Lijo.Lazar@amd.com">@Lazar, Lijo</a>,<o:p></o:p> <o:p> </o:p> Ping…<o:p></o:p> <o:p> </o:p> Thanks<o:p></o:p> Sam<o:p></o:p> <o:p> </o:p> <div id="mail-editor-reference-message-container"> <div> <div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm"> From: Zhang, Owen(SRDC) <Owen.Zhang2@amd.com> Date: Wednesday, May 14, 2025 at 18:07 To: Koenig, Christian <Christian.Koenig@amd.com>, Zhang, GuoQing (Sam) <GuoQing.Zhang@amd.com>, amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>, Lazar, Lijo <Lijo.Lazar@amd.com> Cc: Zhao, Victor <Victor.Zhao@amd.com>, Chang, HaiJun <HaiJun.Chang@amd.com>, Zhang, GuoQing (Sam) <GuoQing.Zhang@amd.com>, Deucher, Alexander <Alexander.Deucher@amd.com>, Ma, Qing (Mark) <Qing.Ma@amd.com> Subject: RE: [PATCH v5 0/4] enable xgmi node migration support for hibernate on SRIOV.<o:p></o:p> </div> <div> <a name="BM_BEGIN"></a>[AMD Official Use Only - AMD Internal Distribution Only] Hi, @Koenig, Christian @Lazar, Lijo kindly pls provide your expertise for the Sam's update below. Thanks for your support. Rgds/Owen -----Original Message----- From: Samuel Zhang <guoqing.zhang@amd.com> Sent: Monday, May 12, 2025 2:42 PM To: amd-gfx@lists.freedesktop.org Cc: Zhao, Victor <Victor.Zhao@amd.com>; Chang, HaiJun <HaiJun.Chang@amd.com>; Zhang, GuoQing (Sam) <GuoQing.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Owen(SRDC) <Owen.Zhang2@amd.com>; Ma, Qing (Mark) <Qing.Ma@amd.com> Subject: [PATCH v5 0/4] enable xgmi node migration support for hibernate on SRIOV. On SRIOV and VM environment, customer may need to switch to new vGPU indexes after hibernate and then resume the VM. For GPUs with XGMI, `vram_start` will change in this case, the FB aperture gpu address of VRAM BOs will also change. These gpu addresses need to be updated when resume. But these addresses are all over the KMD codebase, updating each of them is error-prone and not acceptable. The solution is to use pdb0 page table to cover both vram and gart memory and use pdb0 virtual gpu address instead. When gpu indexes change, the virtual gpu address won't change. For psp and smu, pdb0's gpu address does not work, so the original FB aperture gpu address is used instead. They need to be updated when resume with changed vGPUs. v2: - remove physical_node_id_changed - set vram_start to 0 to switch cached gpu addr to gart aperture - cleanup pdb0 patch v3: - remove gmc_v9_0_init_sw_mem_ranges() call - remove vram_offset memeber - add 4 refactoring patch to remove cached gpu addr - cleanup pdb0 patch v4: - remove gmc_v9_0_mc_init() call and `refresh` update. - do not set `fb_start` in mmhub_v1_8_get_fb_location() when pdb0 enabled. v5: - add amdgpu_virt_xgmi_migrate_enabled() check - move vram_base_offset update to pdb0 patch - remove 4 refactoring patches to remove cached gpu addr - add patch to fix IH not working issue when resume with new VF Samuel Zhang (4): drm/amdgpu: update xgmi info on resume drm/amdgpu: update GPU addresses for SMU and PSP drm/amdgpu: enable pdb0 for hibernation on SRIOV drm/amdgpu: fix fence fallback timer expired error drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 27 ++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 32 +++++++++++++++++----- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 20 ++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 27 ++++++++++++++++++ drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 7 +++++ drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c | 2 +- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16 ++++++++--- drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 6 ++-- drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 4 +++ drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 18 ++++++++++++ 15 files changed, 152 insertions(+), 15 deletions(-) -- 2.43.5<o:p></o:p> </div> </div> </div> </div> </div> </body> </html>