<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#467886" vlink="#96607D" style="word-wrap:break-word"> <p style="font-family:Calibri;font-size:10pt;color:#008000;margin:5pt;font-style:normal;font-weight:normal;text-decoration:none;" align="Left"> [Public]<br> </p> <br> <div> <div class="WordSection1"> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Hi Lijo,<o:p></o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><o:p> </o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif">As per discussion offline, understood the requirement. Will drop this patch and send a fresh one as discussed later.<o:p></o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><o:p> </o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Thanks & Regards<o:p></o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif">Asad<o:p></o:p></span></p> <p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Arial",sans-serif"><o:p> </o:p></span></p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> <p class="MsoNormal" style="margin-left:.5in"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Lazar, Lijo <Lijo.Lazar@amd.com> <br> <b>Sent:</b> Tuesday, August 5, 2025 9:54 PM<br> <b>To:</b> Kamal, Asad <Asad.Kamal@amd.com>; amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> Zhang, Hawking <Hawking.Zhang@amd.com>; Ma, Le <Le.Ma@amd.com>; Zhang, Morris <Shiwu.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Kamal, Asad <Asad.Kamal@amd.com><br> <b>Subject:</b> Re: [PATCH v2] drm/amd/pm: Increase cache interval time<o:p></o:p></span></p> </div> </div> <p class="MsoNormal" style="margin-left:.5in"><o:p> </o:p></p> <p style="mso-margin-top-alt:5.0pt;margin-right:5.0pt;margin-bottom:5.0pt;margin-left:41.0pt"> <span style="font-size:10.0pt;font-family:"Calibri",sans-serif;color:green">[Public]<o:p></o:p></span></p> <p class="MsoNormal" style="margin-left:.5in"><o:p> </o:p></p> <div> <div> <p class="MsoNormal" style="margin-left:.5in">Hi Asad,<o:p></o:p></p> </div> <div> <p class="MsoNormal" style="margin-left:.5in"><o:p> </o:p></p> </div> <div> <p class="MsoNormal" style="margin-left:.5in">Sorry, after initing the cache interval time, I meant to move the cache time check logic to swsmu level and not at smu v13.0.12. I believe this was the original ask from Alex.<o:p></o:p></p> </div> <div> <p class="MsoNormal" style="margin-left:.5in"><o:p> </o:p></p> </div> <div> <p class="MsoNormal" style="margin-left:.5in">Other SOCs can customize if required by adjusting the cache interval.<o:p></o:p></p> </div> <div id="ms-outlook-mobile-body-separator-line"> <p class="MsoNormal" style="margin-left:.5in"><o:p> </o:p></p> </div> <div id="ms-outlook-mobile-signature"> <div> <p class="MsoNormal" style="margin-left:.5in">Thanks,<o:p></o:p></p> </div> <div> <p class="MsoNormal" style="margin-left:.5in">Lijo<o:p></o:p></p> </div> </div> <div class="MsoNormal" align="center" style="margin-left:.5in;text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> <p class="MsoNormal" style="margin-left:.5in"><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:black"> Kamal, Asad <<a href="mailto:Asad.Kamal@amd.com">Asad.Kamal@amd.com</a>><br> <b>Sent:</b> Tuesday, August 5, 2025 9:20:58 PM<br> <b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>>; Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>><br> <b>Cc:</b> Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>>; Ma, Le <<a href="mailto:Le.Ma@amd.com">Le.Ma@amd.com</a>>; Zhang, Morris <<a href="mailto:Shiwu.Zhang@amd.com">Shiwu.Zhang@amd.com</a>>; Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Kamal, Asad <<a href="mailto:Asad.Kamal@amd.com">Asad.Kamal@amd.com</a>><br> <b>Subject:</b> [PATCH v2] drm/amd/pm: Increase cache interval time</span> <o:p></o:p></p> <div> <p class="MsoNormal" style="margin-left:.5in"> <o:p></o:p></p> </div> </div> <div> <div> <p class="MsoNormal" style="mso-margin-top-alt:0in;margin-right:0in;margin-bottom:12.0pt;margin-left:.5in"> <span style="font-size:11.0pt">Increase cache interval time to 50 ms while fetching system<br> metrics table for smu_v13_0_12 since polling interval is less frequent for<br> this data.<br> <br> v2: Make caching interval soc independent, however customization can be<br> done in soc specific callbacks(Alex/Lijo)<br> <br> Signed-off-by: Asad Kamal <<a href="mailto:asad.kamal@amd.com">asad.kamal@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 ++++<br> drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +++<br> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 9 ++++-----<br> 3 files changed, 11 insertions(+), 5 deletions(-)<br> <br> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br> index dc48a1dd8be4..c62d68d7410f 100644<br> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br> @@ -1162,8 +1162,12 @@ static void smu_free_dummy_read_table(struct smu_context *smu)<br> <br> static int smu_smc_table_sw_init(struct smu_context *smu)<br> {<br> + struct smu_table_context *smu_table = &smu->smu_table;<br> int ret;<br> <br> + smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval =<br> + AMDGPU_TEMP_METRICS_CACHE_INTERVAL;<br> +<br> /**<br> * Create smu_table structure, and init smc tables such as<br> * TABLE_PPTABLE, TABLE_WATERMARKS, TABLE_SMU_METRICS, and etc.<br> diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br> index 611b381b9147..7a52c00c700e 100644<br> --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br> +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br> @@ -32,6 +32,8 @@<br> #include "smu_types.h"<br> #include "linux/firmware.h"<br> <br> +#define AMDGPU_TEMP_METRICS_CACHE_INTERVAL 50<br> +<br> #define SMU_THERMAL_MINIMUM_ALERT_TEMP 0<br> #define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255<br> #define SMU_TEMPERATURE_UNITS_PER_CENTIGRADES 1000<br> @@ -258,6 +260,7 @@ struct smu_table {<br> struct amdgpu_bo *bo;<br> uint32_t version;<br> unsigned long metrics_time;<br> + uint32_t cache_interval;<br> };<br> <br> enum smu_perf_level_designation {<br> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br> index fca50f6a8ef6..5ead66375d38 100644<br> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br> @@ -361,18 +361,17 @@ int smu_v13_0_12_get_smu_metrics_data(struct smu_context *smu,<br> return 0;<br> }<br> <br> -static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table,<br> - bool bypass_cache)<br> +static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table)<br> {<br> struct smu_table_context *smu_table = &smu->smu_table;<br> uint32_t table_size = smu_table->tables[SMU_TABLE_SMU_METRICS].size;<br> struct smu_table *table = &smu_table->driver_table;<br> int ret;<br> <br> - if (bypass_cache || !smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time ||<br> + if (!smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time ||<br> time_after(jiffies,<br> smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time +<br> - msecs_to_jiffies(1))) {<br> + msecs_to_jiffies(smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval))) {<br> ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetSystemMetricsTable, NULL);<br> if (ret) {<br> dev_info(smu->adev->dev,<br> @@ -544,7 +543,7 @@ static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu,<br> else if (type == SMU_TEMP_METRIC_BASEBOARD)<br> smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);<br> <br> - ret = smu_v13_0_12_get_system_metrics_table(smu, metrics, false);<br> + ret = smu_v13_0_12_get_system_metrics_table(smu, metrics);<br> if (ret) {<br> kfree(metrics);<br> return ret;<br> -- <br> 2.46.0<o:p></o:p></span></p> </div> </div> </div> </div> </div> </body> </html>