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[Public]<br>
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Hi Asad,</div>
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Sorry, after initing the cache interval time, I meant to move the cache time check logic to swsmu level and not at smu v13.0.12. I believe this was the original ask from Alex.</div>
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Other SOCs can customize if required by adjusting the cache interval.</div>
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<div dir="auto">Thanks,</div>
<div dir="auto">Lijo</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kamal, Asad <Asad.Kamal@amd.com><br>
<b>Sent:</b> Tuesday, August 5, 2025 9:20:58 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Lazar, Lijo <Lijo.Lazar@amd.com><br>
<b>Cc:</b> Zhang, Hawking <Hawking.Zhang@amd.com>; Ma, Le <Le.Ma@amd.com>; Zhang, Morris <Shiwu.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Kamal, Asad <Asad.Kamal@amd.com><br>
<b>Subject:</b> [PATCH v2] drm/amd/pm: Increase cache interval time</font>
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<div class="PlainText">Increase cache interval time to 50 ms while fetching system<br>
metrics table for smu_v13_0_12 since polling interval is less frequent for<br>
this data.<br>
<br>
v2: Make caching interval soc independent, however customization can be<br>
done in soc specific callbacks(Alex/Lijo)<br>
<br>
Signed-off-by: Asad Kamal <asad.kamal@amd.com><br>
---<br>
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 ++++<br>
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +++<br>
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 9 ++++-----<br>
3 files changed, 11 insertions(+), 5 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
index dc48a1dd8be4..c62d68d7410f 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
@@ -1162,8 +1162,12 @@ static void smu_free_dummy_read_table(struct smu_context *smu)<br>
<br>
static int smu_smc_table_sw_init(struct smu_context *smu)<br>
{<br>
+ struct smu_table_context *smu_table = &smu->smu_table;<br>
int ret;<br>
<br>
+ smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval =<br>
+ AMDGPU_TEMP_METRICS_CACHE_INTERVAL;<br>
+<br>
/**<br>
* Create smu_table structure, and init smc tables such as<br>
* TABLE_PPTABLE, TABLE_WATERMARKS, TABLE_SMU_METRICS, and etc.<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
index 611b381b9147..7a52c00c700e 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
@@ -32,6 +32,8 @@<br>
#include "smu_types.h"<br>
#include "linux/firmware.h"<br>
<br>
+#define AMDGPU_TEMP_METRICS_CACHE_INTERVAL 50<br>
+<br>
#define SMU_THERMAL_MINIMUM_ALERT_TEMP 0<br>
#define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255<br>
#define SMU_TEMPERATURE_UNITS_PER_CENTIGRADES 1000<br>
@@ -258,6 +260,7 @@ struct smu_table {<br>
struct amdgpu_bo *bo;<br>
uint32_t version;<br>
unsigned long metrics_time;<br>
+ uint32_t cache_interval;<br>
};<br>
<br>
enum smu_perf_level_designation {<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br>
index fca50f6a8ef6..5ead66375d38 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c<br>
@@ -361,18 +361,17 @@ int smu_v13_0_12_get_smu_metrics_data(struct smu_context *smu,<br>
return 0;<br>
}<br>
<br>
-static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table,<br>
- bool bypass_cache)<br>
+static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table)<br>
{<br>
struct smu_table_context *smu_table = &smu->smu_table;<br>
uint32_t table_size = smu_table->tables[SMU_TABLE_SMU_METRICS].size;<br>
struct smu_table *table = &smu_table->driver_table;<br>
int ret;<br>
<br>
- if (bypass_cache || !smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time ||<br>
+ if (!smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time ||<br>
time_after(jiffies,<br>
smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time +<br>
- msecs_to_jiffies(1))) {<br>
+ msecs_to_jiffies(smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval))) {<br>
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetSystemMetricsTable, NULL);<br>
if (ret) {<br>
dev_info(smu->adev->dev,<br>
@@ -544,7 +543,7 @@ static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu,<br>
else if (type == SMU_TEMP_METRIC_BASEBOARD)<br>
smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0);<br>
<br>
- ret = smu_v13_0_12_get_system_metrics_table(smu, metrics, false);<br>
+ ret = smu_v13_0_12_get_system_metrics_table(smu, metrics);<br>
if (ret) {<br>
kfree(metrics);<br>
return ret;<br>
-- <br>
2.46.0<br>
<br>
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