<div dir="auto"><div><br></div><div dir="auto"><div class="gmail_quote gmail_quote_container" dir="auto"><div dir="ltr" class="gmail_attr">Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>> ezt írta (időpont: 2025. aug. 18., Hét 22:30):<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">On Mon, Aug 18, 2025 at 4:11 PM Alex Hung <<a href="mailto:alex.hung@amd.com" target="_blank" rel="noreferrer">alex.hung@amd.com</a>> wrote:<br>
><br>
><br>
><br>
> On 8/2/25 10:06, Timur Kristóf wrote:<br>
> > The VUPDATE interrupt isn't registered on DCE 6, so don't try<br>
> > to use that.<br>
> ><br>
> > This fixes a page flip timeout after sleep/resume on DCE 6.<br>
> ><br>
> > Signed-off-by: Timur Kristóf <<a href="mailto:timur.kristof@gmail.com" target="_blank" rel="noreferrer">timur.kristof@gmail.com</a>><br>
> > ---<br>
> > .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 ++++++++++++-------<br>
> > .../amd/display/amdgpu_dm/amdgpu_dm_crtc.c | 16 ++++++++------<br>
> > 2 files changed, 23 insertions(+), 15 deletions(-)<br>
> ><br>
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> > index 470f831a17f7..e8d2ba58cbfa 100644<br>
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> > @@ -2981,14 +2981,20 @@ static void dm_gpureset_toggle_interrupts(struct amdgpu_device *adev,<br>
> > drm_warn(adev_to_drm(adev), "Failed to %s pflip interrupts\n",<br>
> > enable ? "enable" : "disable");<br>
> ><br>
> > - if (enable) {<br>
> > - if (amdgpu_dm_crtc_vrr_active(to_dm_crtc_state(acrtc->base.state)))<br>
> > - rc = amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, true);<br>
> > - } else<br>
> > - rc = amdgpu_dm_crtc_set_vupdate_irq(&acrtc->base, false);<br>
> > -<br>
> > - if (rc)<br>
> > - drm_warn(adev_to_drm(adev), "Failed to %sable vupdate interrupt\n", enable ? "en" : "dis");<br>
> > + if (dc_supports_vrr(adev->dm.dc->ctx->dce_version)) {<br>
> > + if (enable) {<br>
> > + if (amdgpu_dm_crtc_vrr_active(<br>
> > + to_dm_crtc_state(acrtc->base.state)))<br>
> > + rc = amdgpu_dm_crtc_set_vupdate_irq(<br>
> > + &acrtc->base, true);<br>
> > + } else<br>
> > + rc = amdgpu_dm_crtc_set_vupdate_irq(<br>
> > + &acrtc->base, false);<br>
> > +<br>
> > + if (rc)<br>
> > + drm_warn(adev_to_drm(adev), "Failed to %sable vupdate interrupt\n",<br>
> > + enable ? "en" : "dis");<br>
> > + }<br>
><br>
> Hi Timur,<br>
><br>
> There seem to be conflicts to amd-staging-drm-next. Could you please<br>
> rebase and resend? This helps make sure new change fix the problem you<br>
> observed.<br>
><br>
> Really appreciate it. Thanks.<br>
<br>
If it's just the first patch, you can skip that one as the conflict<br>
solves the issue with DSC.<br>
<br>
Alex<br></blockquote></div></div><div dir="auto"><br></div><div dir="auto">Hi Alex,</div><div dir="auto"><br></div><div dir="auto">This is a different series, not the same one that had the patch for the DSC crash. I can send a rebased version tomorrow.</div><div dir="auto"><br></div><div dir="auto">Additionally, I have one more patch that solves another case of page flip timeout on DCE 6, I will add that to the next version of the series too if that's okay.</div><div dir="auto"><br></div><div dir="auto">Thanks,</div><div dir="auto">Timur</div><div dir="auto"><br></div><div dir="auto"><br></div><div dir="auto"><div class="gmail_quote gmail_quote_container" dir="auto"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
><br>
> ><br>
> > irq_source = IRQ_TYPE_VBLANK + acrtc->otg_inst;<br>
> > /* During gpu-reset we disable and then enable vblank irq, so<br>
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c<br>
> > index 2551823382f8..f2208e4224f9 100644<br>
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c<br>
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c<br>
> > @@ -298,13 +298,15 @@ static inline int amdgpu_dm_crtc_set_vblank(struct drm_crtc *crtc, bool enable)<br>
> ><br>
> > irq_type = amdgpu_display_crtc_idx_to_irq_type(adev, acrtc->crtc_id);<br>
> ><br>
> > - if (enable) {<br>
> > - /* vblank irq on -> Only need vupdate irq in vrr mode */<br>
> > - if (amdgpu_dm_crtc_vrr_active(acrtc_state))<br>
> > - rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);<br>
> > - } else {<br>
> > - /* vblank irq off -> vupdate irq off */<br>
> > - rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);<br>
> > + if (dc_supports_vrr(dm->dc->ctx->dce_version)) {<br>
> > + if (enable) {<br>
> > + /* vblank irq on -> Only need vupdate irq in vrr mode */<br>
> > + if (amdgpu_dm_crtc_vrr_active(acrtc_state))<br>
> > + rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, true);<br>
> > + } else {<br>
> > + /* vblank irq off -> vupdate irq off */<br>
> > + rc = amdgpu_dm_crtc_set_vupdate_irq(crtc, false);<br>
> > + }<br>
> > }<br>
> ><br>
> > if (rc)<br>
><br>
</blockquote></div></div></div>