[Beignet] [PATCH v2 5/7] GBE: add scalar register support in loadImmInstruction.

Zhigang Gong zhigang.gong at linux.intel.com
Sun May 12 20:32:22 PDT 2013


There is a slight possibility that the destination register
is a scalar register. We need to check it here.

Signed-off-by: Zhigang Gong <zhigang.gong at linux.intel.com>
---
 backend/src/backend/gen_insn_selection.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 2bd9aca..7280d7a 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -1546,6 +1546,13 @@ namespace gbe
       const Immediate imm = insn.getImmediate();
       const GenRegister dst = sel.selReg(insn.getDst(0), type);
 
+      sel.push();
+      if (sel.isScalarOrBool(insn.getDst(0)) == true) {
+        sel.curr.execWidth = 1;
+        sel.curr.predicate = GEN_PREDICATE_NONE;
+        sel.curr.noMask = 1;
+      }
+
       switch (type) {
         case TYPE_U32:
         case TYPE_S32:
@@ -1559,6 +1566,7 @@ namespace gbe
         case TYPE_S8:  sel.MOV(dst, GenRegister::immw(imm.data.s8)); break;
         default: NOT_SUPPORTED;
       }
+      sel.pop();
       return true;
     }
 
-- 
1.7.11.7



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