[Beignet] [PATCH v2 1/2] CL: Tell the kernel an image bo's tiling mode.
Zhigang Gong
zhigang.gong at linux.intel.com
Thu May 16 01:06:02 PDT 2013
For an image bo allocation, we need to set its tiling mode thus
latter when we use map gtt to map its to a linear address space, the
kernel can do correct mapping. Otherwise, kernel will treat it as
not a tiled suface.
Signed-off-by: Zhigang Gong <zhigang.gong at linux.intel.com>
---
src/cl_driver.h | 6 +++++-
src/cl_driver_defs.c | 1 +
src/cl_mem.c | 2 ++
src/intel/intel_driver.c | 36 ++++++++++++++++++++++++++++++++++--
4 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/src/cl_driver.h b/src/cl_driver.h
index 76fa8ce..e8ebad1 100644
--- a/src/cl_driver.h
+++ b/src/cl_driver.h
@@ -184,9 +184,13 @@ extern cl_gpgpu_walker_cb *cl_gpgpu_walker;
* Buffer
**************************************************************************/
/* Allocate a buffer */
-typedef cl_buffer (cl_buffer_alloc_cb)(cl_buffer_mgr, const char*, unsigned long, unsigned long);
+typedef cl_buffer (cl_buffer_alloc_cb)(cl_buffer_mgr, const char*, size_t, size_t);
extern cl_buffer_alloc_cb *cl_buffer_alloc;
+/* Set a buffer's tiling mode */
+typedef cl_buffer (cl_buffer_set_tiling_cb)(cl_buffer, int tiling, size_t stride);
+extern cl_buffer_set_tiling_cb *cl_buffer_set_tiling;
+
#include "cl_context.h"
typedef struct _cl_context *cl_context;
diff --git a/src/cl_driver_defs.c b/src/cl_driver_defs.c
index c7dc59b..2c77a22 100644
--- a/src/cl_driver_defs.c
+++ b/src/cl_driver_defs.c
@@ -29,6 +29,7 @@ LOCAL cl_driver_get_device_id_cb *cl_driver_get_device_id = NULL;
/* Buffer */
LOCAL cl_buffer_alloc_cb *cl_buffer_alloc = NULL;
+LOCAL cl_buffer_set_tiling_cb *cl_buffer_set_tiling = NULL;
LOCAL cl_buffer_alloc_from_eglimage_cb *cl_buffer_alloc_from_eglimage = NULL;
LOCAL cl_buffer_reference_cb *cl_buffer_reference = NULL;
LOCAL cl_buffer_unreference_cb *cl_buffer_unreference = NULL;
diff --git a/src/cl_mem.c b/src/cl_mem.c
index 6950590..10c96de 100644
--- a/src/cl_mem.c
+++ b/src/cl_mem.c
@@ -418,6 +418,8 @@ _cl_mem_new_image(cl_context ctx,
mem->tiling = tiling;
mem->type = image_type;
+ cl_buffer_set_tiling(mem->bo, tiling, aligned_pitch);
+
exit:
if (errcode_ret)
*errcode_ret = err;
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index 3a506c6..ebc4961 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -45,12 +45,12 @@
* Zou Nan hai <nanhai.zou at intel.com>
*
*/
-#define GL_GLEXT_PROTOTYPES
#include "intel_driver.h"
#include "intel_gpgpu.h"
#include "intel_batchbuffer.h"
#include "intel_bufmgr.h"
#include "x11/dricommon.h"
+#include "cl_mem.h"
#include <assert.h>
#include <unistd.h>
@@ -408,7 +408,6 @@ static void* drm_intel_bo_get_virtual(drm_intel_bo *bo) { return bo->virtual; }
#include "GL/gl.h"
#include "EGL/egl.h"
#include "EGL/eglext.h"
-#include "cl_mem.h"
static int get_cl_tiling(uint32_t drm_tiling)
{
switch(drm_tiling) {
@@ -468,6 +467,38 @@ cl_buffer intel_alloc_buffer_from_eglimage(cl_context ctx,
}
#endif
+static int32_t get_intel_tiling(cl_int tiling, uint32_t *intel_tiling)
+{
+ switch (tiling) {
+ case CL_NO_TILE:
+ *intel_tiling = I915_TILING_NONE;
+ break;
+ case CL_TILE_X:
+ *intel_tiling = I915_TILING_X;
+ break;
+ case CL_TILE_Y:
+ *intel_tiling = I915_TILING_Y;
+ break;
+ default:
+ assert(0);
+ return -1;
+ }
+ return 0;
+}
+
+static int intel_buffer_set_tiling(cl_buffer bo,
+ cl_image_tiling_t tiling, size_t stride)
+{
+ uint32_t intel_tiling, required_tiling;
+ int ret;
+ if (UNLIKELY((get_intel_tiling(tiling, &intel_tiling)) < 0))
+ return -1;
+ required_tiling = intel_tiling;
+ ret = drm_intel_bo_set_tiling((drm_intel_bo*)bo, &intel_tiling, stride);
+ assert(intel_tiling == required_tiling);
+ return ret;
+}
+
LOCAL void
intel_setup_callbacks(void)
{
@@ -477,6 +508,7 @@ intel_setup_callbacks(void)
cl_driver_get_bufmgr = (cl_driver_get_bufmgr_cb *) intel_driver_get_bufmgr;
cl_driver_get_device_id = (cl_driver_get_device_id_cb *) intel_get_device_id;
cl_buffer_alloc = (cl_buffer_alloc_cb *) drm_intel_bo_alloc;
+ cl_buffer_set_tiling = (cl_buffer_set_tiling_cb *) intel_buffer_set_tiling;
#ifdef HAS_EGL
cl_buffer_alloc_from_eglimage = (cl_buffer_alloc_from_eglimage_cb *) intel_alloc_buffer_from_eglimage;
#endif
--
1.7.11.7
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