[Beignet] [PATCH 3/5] GBE: Don't modify argument 0 of the get image information instruction.
Zhigang Gong
zhigang.gong at intel.com
Wed Nov 6 17:55:07 PST 2013
When the first round compilation fail, GBE will turn to recompile the
sample program by using another profile. If we changed the argument
0 of the get image information instruction, then it will fail the second
round compilation. But the argument 1 is ok to change, as we never change
the first instruction's argument, and all the subsequent instruction's
argument 1 is free to change.
Signed-off-by: Zhigang Gong <zhigang.gong at intel.com>
---
backend/src/backend/context.cpp | 6 +++---
backend/src/backend/gen_insn_selection.cpp | 2 +-
backend/src/llvm/llvm_gen_backend.cpp | 2 --
3 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/backend/src/backend/context.cpp b/backend/src/backend/context.cpp
index 25d4f9c..cbeef24 100644
--- a/backend/src/backend/context.cpp
+++ b/backend/src/backend/context.cpp
@@ -451,7 +451,6 @@ namespace gbe
insertCurbeReg(ir::ocl::lid0, this->newCurbeEntry(GBE_CURBE_LOCAL_ID_X, 0, localIDSize));
insertCurbeReg(ir::ocl::lid1, this->newCurbeEntry(GBE_CURBE_LOCAL_ID_Y, 0, localIDSize));
insertCurbeReg(ir::ocl::lid2, this->newCurbeEntry(GBE_CURBE_LOCAL_ID_Z, 0, localIDSize));
- insertCurbeReg(ir::ocl::samplerinfo, this->newCurbeEntry(GBE_CURBE_SAMPLER_INFO, 0, 32));
// Go over all the instructions and find the special register we need
// to push
@@ -480,9 +479,10 @@ namespace gbe
realImageInfo = insn.getSrc(1);
insertCurbeReg(realImageInfo, offset);
insertCurbeReg(imageInfo, (uint32_t)realImageInfo);
- } else
+ } else {
realImageInfo = ir::Register(curbeRegs.find(imageInfo)->second);
- insn.setSrc(srcID, realImageInfo);
+ insn.setSrc(1, realImageInfo);
+ }
continue;
} else if (insn.getOpcode() == ir::OP_GET_SAMPLER_INFO) {
/* change the src to sampler information register. */
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 6430ee8..0caaffa 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -2842,7 +2842,7 @@ namespace gbe
using namespace ir;
GenRegister dst;
dst = sel.selReg(insn.getDst(0), TYPE_U32);
- GenRegister imageInfoReg = GenRegister::ud1grf(insn.getSrc(0));
+ GenRegister imageInfoReg = GenRegister::ud1grf(insn.getSrc(1));
sel.MOV(dst, imageInfoReg);
return true;
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
index aae52d8..a104df4 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -2248,8 +2248,6 @@ namespace gbe
case GEN_OCL_GET_IMAGE_CHANNEL_ORDER:
{
GBE_ASSERT(AI != AE); const ir::Register surface_id = this->getRegister(*AI); ++AI;
- uint32_t elemNum;
- (void)getVectorInfo(ctx, I.getType(), &I, elemNum);
const ir::Register reg = this->getRegister(&I, 0);
int infoType = it->second - GEN_OCL_GET_IMAGE_WIDTH;
--
1.7.9.5
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