[Beignet] [PATCH 2/3] GBE: Do not change vertical stride when it is 0
Ruiling Song
ruiling.song at intel.com
Tue Nov 19 21:51:31 PST 2013
It will change scalar register g3<0,1,0> into g3<16,1,0> which illegally
crosses more than 2 adjacent rows.
Signed-off-by: Ruiling Song <ruiling.song at intel.com>
---
backend/src/backend/gen_register.hpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/backend/src/backend/gen_register.hpp b/backend/src/backend/gen_register.hpp
index 47b0515..8f06435 100644
--- a/backend/src/backend/gen_register.hpp
+++ b/backend/src/backend/gen_register.hpp
@@ -277,7 +277,8 @@ namespace gbe
GBE_ASSERT(isint64());
GenRegister r = h2(*this);
r.type = type == GEN_TYPE_UL ? GEN_TYPE_UD : GEN_TYPE_D;
- r.vstride = GEN_VERTICAL_STRIDE_16;
+ if(r.vstride != GEN_VERTICAL_STRIDE_0)
+ r.vstride = GEN_VERTICAL_STRIDE_16;
return r;
}
--
1.7.9.5
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