[Beignet] [PATCH 1/2] Add FCMP UNO support.
Zhigang Gong
zhigang.gong at linux.intel.com
Tue Nov 26 20:48:44 PST 2013
Good idea to implement UXX instruction. LGTM, will push latter. Thanks.
On Mon, Nov 25, 2013 at 03:08:08PM +0800, Yang Rong wrote:
> And also correct some UXX compares.
>
> Signed-off-by: Yang Rong <rong.r.yang at intel.com>
> ---
> backend/src/backend/gen_insn_selection.cpp | 3 +-
> backend/src/llvm/llvm_gen_backend.cpp | 54 +++++++++++++++++++++++-------
> 2 files changed, 43 insertions(+), 14 deletions(-)
>
> diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
> index 3661c2b..6756352 100644
> --- a/backend/src/backend/gen_insn_selection.cpp
> +++ b/backend/src/backend/gen_insn_selection.cpp
> @@ -2526,7 +2526,8 @@ namespace gbe
> SelectionDAG *dag1 = dag.child[1];
>
> // Right source can always be an immediate
> - if (OCL_OPTIMIZE_IMMEDIATE && dag1 != NULL && dag1->insn.getOpcode() == OP_LOADI && canGetRegisterFromImmediate(dag1->insn)) {
> + if (OCL_OPTIMIZE_IMMEDIATE && dag1 != NULL && dag1->insn.getOpcode() == OP_LOADI
> + && canGetRegisterFromImmediate(dag1->insn) && opcode != OP_ORD) {
> const auto &childInsn = cast<LoadImmInstruction>(dag1->insn);
> src0 = sel.selReg(insn.getSrc(0), type);
> src1 = getRegisterFromImmediate(childInsn.getImmediate());
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
> index 1c932bd..6b2a1d4 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -1606,26 +1606,54 @@ namespace gbe
> // Get the element type and the number of elements
> Type *operandType = I.getOperand(0)->getType();
> const ir::Type type = getType(ctx, operandType);
> + const ir::Type insnType = getType(ctx, I.getType());
>
> // Emit the instructions in a row
> const ir::Register dst = this->getRegister(&I);
> const ir::Register src0 = this->getRegister(I.getOperand(0));
> const ir::Register src1 = this->getRegister(I.getOperand(1));
> + const ir::Register tmp = ctx.reg(getFamily(ctx, I.getType()));
> + Value *cv = ConstantInt::get(I.getType(), 1);
>
> switch (I.getPredicate()) {
> - case ICmpInst::FCMP_OEQ:
> - case ICmpInst::FCMP_UEQ: ctx.EQ(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_ONE:
> - case ICmpInst::FCMP_UNE: ctx.NE(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_OLE:
> - case ICmpInst::FCMP_ULE: ctx.LE(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_OGE:
> - case ICmpInst::FCMP_UGE: ctx.GE(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_OLT:
> - case ICmpInst::FCMP_ULT: ctx.LT(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_OGT:
> - case ICmpInst::FCMP_UGT: ctx.GT(type, dst, src0, src1); break;
> - case ICmpInst::FCMP_ORD: ctx.ORD(type, dst, src0, src0); break;
> + case ICmpInst::FCMP_OEQ: ctx.EQ(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_ONE: ctx.NE(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_OLE: ctx.LE(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_OGE: ctx.GE(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_OLT: ctx.LT(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_OGT: ctx.GT(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_ORD: ctx.ORD(type, dst, src0, src1); break;
> + case ICmpInst::FCMP_UNO:
> + ctx.ORD(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_UEQ:
> + ctx.NE(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_UGT:
> + ctx.LE(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_UGE:
> + ctx.LT(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_ULT:
> + ctx.GE(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_ULE:
> + ctx.GT(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_UNE:
> + ctx.EQ(type, tmp, src0, src1);
> + ctx.XOR(insnType, dst, tmp, getRegister(cv));
> + break;
> + case ICmpInst::FCMP_TRUE:
> + ctx.MOV(insnType, dst, getRegister(cv));
> + break;
> default: NOT_SUPPORTED;
> }
> }
> --
> 1.8.1.2
>
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