[Beignet] [PATCH] Fix a read64/write64 schedule bug.
Zhigang Gong
zhigang.gong at linux.intel.com
Thu Oct 17 02:19:08 PDT 2013
LGTM, pushed, thanks.
On Tue, Oct 15, 2013 at 06:36:03PM +0800, Yang Rong wrote:
> Set the read64/write64 correct data type, otherwise, the dependency will wrong.
>
> Signed-off-by: Yang Rong <rong.r.yang at intel.com>
> ---
> backend/src/backend/gen_insn_selection.cpp | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
> index cddd76e..84b9983 100644
> --- a/backend/src/backend/gen_insn_selection.cpp
> +++ b/backend/src/backend/gen_insn_selection.cpp
> @@ -2296,7 +2296,7 @@ namespace gbe
> for (dstID = 0; dstID < tmpRegNum ; ++dstID)
> dst[dstID] = sel.selReg(sel.reg(FAMILY_DWORD));
> for ( uint32_t valueID = 0; valueID < valueNum; ++dstID, ++valueID)
> - dst[dstID] = sel.selReg(insn.getValue(valueID));
> + dst[dstID] = sel.selReg(insn.getValue(valueID), ir::TYPE_U64);
> sel.READ64(addr, sel.selReg(sel.reg(FAMILY_QWORD), ir::TYPE_U64), dst, valueNum + tmpRegNum, valueNum, bti);
> }
>
> @@ -2416,7 +2416,7 @@ namespace gbe
> dst[srcID + 1] = sel.selReg(sel.reg(FAMILY_DWORD));
>
> for (uint32_t valueID = 0; valueID < valueNum; ++valueID)
> - src[valueID] = sel.selReg(insn.getValue(valueID));
> + src[valueID] = sel.selReg(insn.getValue(valueID), ir::TYPE_U64);
> sel.WRITE64(addr, src, valueNum, dst, tmpRegNum + 1, bti);
> }
>
> --
> 1.8.1.2
>
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