[Beignet] [PATCH] Fix a read64/write64 schedule bug.

[Sun, Yi]

The piglit case are pass by disabling the schedule.
But utest failed at case runtime_null_kernel_arg.
The same fail occurred if I reverted that patch.

Thanks
  --Sun, Yi

> -----Original Message-----
> From: Zhigang Gong [mailto:zhigang.gong at linux.intel.com]
> Sent: Friday, October 18, 2013 11:29 AM
> To: Sun, Yi; Yang, Rong R
> Cc: beignet at lists.freedesktop.org
> Subject: RE: [Beignet] [PATCH] Fix a read64/write64 schedule bug.
> 
> Yi,
> 
> Could you disable the instruction scheduling and do the regression test again?
> 
> export OCL_PRE_ALLOC_INSN_SCHEDULE=0
> export OCL_POST_ALLOC_INSN_SCHEDULE=0
> 
> And run the unit test without this patch and then with this patch.
> 
> -----Original Message-----
> From: beignet-bounces+zhigang.gong=linux.intel.com at lists.freedesktop.org
> [mailto:beignet-bounces+zhigang.gong=linux.intel.com at lists.freedesktop.org]
> On Behalf Of Sun, Yi
> Sent: Thursday, October 17, 2013 8:15 PM
> To: Zhigang Gong; Yang, Rong R
> Cc: beignet at lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] Fix a read64/write64 schedule bug.
> 
> This patch introduced two piglit case regression:
> 
> ./piglit-run.py -t builtin-ulong-mad_sat-1.0.generated tests/all_cl.test
> t ./piglit-run.py -t builtin-long-mad_sat-1.0.generated tests/all_cl.test t
> 
> But indeed it fixed 5 existed bugs:
> Program/Execute/gegl-rgb-gamma-u8-to-ragabaf
> Program/Execute/Store/store-long16-local
> Program/Execute/Store/store-long8-global
> Program/Execute/Store/store-ulong16-local
> Program/Execute/Store/store-ulong8-global
> 
> 667f6c537c1de824a16a89ee5a5b2a01b40b78df
> Author: Yang Rong <rong.r.yang at intel.com>
> Date:   Tue Oct 15 18:36:03 2013 +0800
> 
> 	Fix a read64/write64 schedule bug.
> 	Set the read64/write64 correct data type, otherwise, the dependency will
> 
> Thanks
>   --Sun, Yi
> 
> > -----Original Message-----
> > From: beignet-bounces+yi.sun=intel.com at lists.freedesktop.org
> > [mailto:beignet-bounces+yi.sun=intel.com at lists.freedesktop.org] On
> > Behalf Of Zhigang Gong
> > Sent: Thursday, October 17, 2013 5:19 PM
> > To: Yang, Rong R
> > Cc: beignet at lists.freedesktop.org
> > Subject: Re: [Beignet] [PATCH] Fix a read64/write64 schedule bug.
> >
> > LGTM, pushed, thanks.
> >
> > On Tue, Oct 15, 2013 at 06:36:03PM +0800, Yang Rong wrote:
> > > Set the read64/write64 correct data type, otherwise, the dependency
> > > will
> > wrong.
> > >
> > > Signed-off-by: Yang Rong <rong.r.yang at intel.com>
> > > ---
> > >  backend/src/backend/gen_insn_selection.cpp | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/backend/src/backend/gen_insn_selection.cpp
> > b/backend/src/backend/gen_insn_selection.cpp
> > > index cddd76e..84b9983 100644
> > > --- a/backend/src/backend/gen_insn_selection.cpp
> > > +++ b/backend/src/backend/gen_insn_selection.cpp
> > > @@ -2296,7 +2296,7 @@ namespace gbe
> > >        for (dstID = 0; dstID < tmpRegNum ; ++dstID)
> > >          dst[dstID] = sel.selReg(sel.reg(FAMILY_DWORD));
> > >        for ( uint32_t valueID = 0; valueID < valueNum; ++dstID,
> ++valueID)
> > > -        dst[dstID] = sel.selReg(insn.getValue(valueID));
> > > +        dst[dstID] = sel.selReg(insn.getValue(valueID),
> > > + ir::TYPE_U64);
> > >        sel.READ64(addr, sel.selReg(sel.reg(FAMILY_QWORD),
> > ir::TYPE_U64), dst, valueNum + tmpRegNum, valueNum, bti);
> > >      }
> > >
> > > @@ -2416,7 +2416,7 @@ namespace gbe
> > >          dst[srcID + 1] = sel.selReg(sel.reg(FAMILY_DWORD));
> > >
> > >        for (uint32_t valueID = 0; valueID < valueNum; ++valueID)
> > > -        src[valueID] = sel.selReg(insn.getValue(valueID));
> > > +        src[valueID] = sel.selReg(insn.getValue(valueID),
> > > + ir::TYPE_U64);
> > >        sel.WRITE64(addr, src, valueNum, dst, tmpRegNum + 1, bti);
> > >      }
> > >
> > > --
> > > 1.8.1.2
> > >
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