[Beignet] [PATCH V2 6/7] Runtime/driver : implement 3D image support.

[Zhigang Gong]

Signed-off-by: Zhigang Gong <zhigang.gong at linux.intel.com>
---
 src/cl_api.c              |    1 +
 src/cl_command_queue.c    |    2 +-
 src/cl_driver.h           |    1 +
 src/cl_mem.c              |    8 ++++----
 src/intel/intel_gpgpu.c   |    7 ++++++-
 src/intel/intel_structs.h |   12 +++++++++++-
 6 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/src/cl_api.c b/src/cl_api.c
index aeca782..e96e4a1 100644
--- a/src/cl_api.c
+++ b/src/cl_api.c
@@ -529,6 +529,7 @@ clCreateImage2D(cl_context              context,
   cl_int err = CL_SUCCESS;
   CHECK_CONTEXT (context);
   cl_image_desc image_desc;
+  memset(&image_desc, 0, sizeof(image_desc));
 
   image_desc.image_type = CL_MEM_OBJECT_IMAGE2D;
   image_desc.image_width = image_width;
diff --git a/src/cl_command_queue.c b/src/cl_command_queue.c
index 2454db6..62f2a78 100644
--- a/src/cl_command_queue.c
+++ b/src/cl_command_queue.c
@@ -126,7 +126,7 @@ cl_command_queue_bind_image(cl_command_queue queue, cl_kernel k)
     set_image_info(k->curbe, &k->images[i], image);
     cl_gpgpu_bind_image(queue->gpgpu, k->images[i].idx, image->base.bo,
                         image->intel_fmt, image->image_type,
-                        image->w, image->h,
+                        image->w, image->h, image->depth,
                         image->row_pitch, image->tiling);
   }
   return CL_SUCCESS;
diff --git a/src/cl_driver.h b/src/cl_driver.h
index 024033a..100b38d 100644
--- a/src/cl_driver.h
+++ b/src/cl_driver.h
@@ -114,6 +114,7 @@ typedef void (cl_gpgpu_bind_image_cb)(cl_gpgpu state,
                                       uint32_t type,
                                       int32_t w,
                                       int32_t h,
+                                      int32_t depth,
                                       int pitch,
                                       cl_gpgpu_tiling tiling);
 
diff --git a/src/cl_mem.c b/src/cl_mem.c
index 203f47e..14bf142 100644
--- a/src/cl_mem.c
+++ b/src/cl_mem.c
@@ -382,7 +382,7 @@ _cl_mem_new_image(cl_context ctx,
   cl_int err = CL_SUCCESS;
   cl_mem mem = NULL;
   uint32_t bpp = 0, intel_fmt = INTEL_UNSUPPORTED_FORMAT;
-  size_t sz = 0, aligned_pitch = 0, aligned_h;
+  size_t sz = 0, aligned_pitch = 0, aligned_slice_pitch = 0, aligned_h;
   cl_image_tiling_t tiling = CL_NO_TILE;
 
   /* Check flags consistency */
@@ -465,11 +465,11 @@ _cl_mem_new_image(cl_context ctx,
     goto error;
 
   cl_buffer_set_tiling(mem->bo, tiling, aligned_pitch);
-  slice_pitch = (image_type == CL_MEM_OBJECT_IMAGE1D
-                 || image_type == CL_MEM_OBJECT_IMAGE2D) ? 0 : aligned_pitch*aligned_h;
+  aligned_slice_pitch = (image_type == CL_MEM_OBJECT_IMAGE1D
+                         || image_type == CL_MEM_OBJECT_IMAGE2D) ? 0 : aligned_pitch * ALIGN(h, 2);
 
   cl_mem_image_init(cl_mem_image(mem), w, h, image_type, depth, *fmt,
-                    intel_fmt, bpp, aligned_pitch, slice_pitch, tiling,
+                    intel_fmt, bpp, aligned_pitch, aligned_slice_pitch, tiling,
                     0, 0, 0);
 
   /* Copy the data if required */
diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c
index 597d031..7b82b76 100644
--- a/src/intel/intel_gpgpu.c
+++ b/src/intel/intel_gpgpu.c
@@ -574,6 +574,7 @@ intel_gpgpu_bind_image_gen7(intel_gpgpu_t *gpgpu,
                               cl_mem_object_type type,
                               int32_t w,
                               int32_t h,
+                              int32_t depth,
                               int32_t pitch,
                               int32_t tiling)
 {
@@ -587,6 +588,9 @@ intel_gpgpu_bind_image_gen7(intel_gpgpu_t *gpgpu,
   ss->ss1.base_addr = obj_bo->offset;
   ss->ss2.width = w - 1;
   ss->ss2.height = h - 1;
+  ss->ss3.depth = depth - 1;
+  ss->ss4.not_str_buf.rt_view_extent = depth - 1;
+  ss->ss4.not_str_buf.min_array_element = 0;
   ss->ss3.pitch = pitch - 1;
   ss->ss5.cache_control = cc_llc_l3;
   if (tiling == GPGPU_TILE_X) {
@@ -643,10 +647,11 @@ intel_gpgpu_bind_image(intel_gpgpu_t *gpgpu,
                        cl_mem_object_type type,
                        int32_t w,
                        int32_t h,
+                       int32_t depth,
                        int32_t pitch,
                        cl_gpgpu_tiling tiling)
 {
-  intel_gpgpu_bind_image_gen7(gpgpu, index, (drm_intel_bo*) obj_bo, format, type, w, h, pitch, tiling);
+  intel_gpgpu_bind_image_gen7(gpgpu, index, (drm_intel_bo*) obj_bo, format, type, w, h, depth, pitch, tiling);
   assert(index < GEN_MAX_SURFACES);
 }
 
diff --git a/src/intel/intel_structs.h b/src/intel/intel_structs.h
index 7c27ace..36b5971 100644
--- a/src/intel/intel_structs.h
+++ b/src/intel/intel_structs.h
@@ -209,7 +209,17 @@ typedef struct gen7_surface_state
     uint32_t depth:11;
   } ss3;
 
-  uint32_t ss4;
+  union {
+    struct {
+      uint32_t mulsample_pal_idx:3;
+      uint32_t numer_mulsample:3;
+      uint32_t mss_fmt:1;
+      uint32_t rt_view_extent:11;
+      uint32_t min_array_element:11;
+      uint32_t rt_rotate:2;
+      uint32_t pad0:1;
+    } not_str_buf;
+  } ss4;
 
   struct {
     uint32_t mip_count:4;
-- 
1.7.9.5