[Beignet] [PATCH] Revert "GBE: refine post register allocation scheduling for global buffers."
Song, Ruiling
ruiling.song at intel.com
Thu Aug 28 00:10:22 PDT 2014
LGTM and tested OK.
-----Original Message-----
From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of Zhigang Gong
Sent: Thursday, August 28, 2014 2:00 PM
To: beignet at lists.freedesktop.org
Cc: Gong, Zhigang
Subject: [Beignet] [PATCH] Revert "GBE: refine post register allocation scheduling for global buffers."
Different BTI buffer may point to the same memory. Let's not change the load/store sequence. This fix a regression at the opencv test suite OCL_Channels/MixChannels.Accuracy/8.
This reverts commit 435f63e9fde93c38331bf0231df5ee8625f88a62.
Singed-off-by: Zhigang Gong <zhigang.gong at linux.intel.com>
---
backend/src/backend/gen_insn_scheduling.cpp | 14 +++-----------
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp
index 4324206..106d608 100644
--- a/backend/src/backend/gen_insn_scheduling.cpp
+++ b/backend/src/backend/gen_insn_scheduling.cpp
@@ -137,9 +137,9 @@ namespace gbe
/*! To track loads and stores */
enum GenMemory : uint8_t {
GLOBAL_MEMORY = 0,
- LOCAL_MEMORY = GLOBAL_MEMORY + 128,
+ LOCAL_MEMORY,
SCRATCH_MEMORY,
- MAX_MEM_SYSTEM
+ MAX_MEM_SYSTEM
};
/*! Do we allocate after or before the register allocation? */ @@ -349,15 +349,7 @@ namespace gbe
uint32_t DependencyTracker::getIndex(uint32_t bti) const {
const uint32_t memDelta = grfNum + MAX_FLAG_REGISTER + MAX_ACC_REGISTER;
- uint32_t memIndex;
- if (bti == 0xfe)
- memIndex = LOCAL_MEMORY;
- else if (bti == 0xff)
- memIndex = SCRATCH_MEMORY;
- else {
- memIndex = GLOBAL_MEMORY + (bti % 128);
- }
- return memDelta + memIndex;
+ return bti == 0xfe ? memDelta + LOCAL_MEMORY : (bti == 0xff ?
+ memDelta + SCRATCH_MEMORY : memDelta + GLOBAL_MEMORY);
}
void DependencyTracker::updateWrites(ScheduleDAGNode *node) {
--
1.8.3.2
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