[Beignet] [PATCH 1/2] GBE: use sr0.1's SLM Offset to eliminate the software SLM offset for HSW.

[Yang, Rong R]

Nice catch, The patchset LGTM.

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Zhigang Gong
> Sent: Wednesday, December 24, 2014 13:14
> To: beignet at lists.freedesktop.org
> Cc: Gong, Zhigang
> Subject: [Beignet] [PATCH 1/2] GBE: use sr0.1's SLM Offset to eliminate the
> software SLM offset for HSW.
> 
> sr0.1 has a SLM Offset bits field which could be used to set slm offset (4K
> unit), so we just need to initialize it at the beginning of the kernel and don't
> need to maintain the software SLM offset.
> 
> Signed-off-by: Zhigang Gong <zhigang.gong at intel.com>
> ---
>  backend/src/backend/gen75_context.cpp      | 12 +++++++++---
>  backend/src/backend/gen_insn_selection.cpp |  2 +-
>  2 files changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/backend/src/backend/gen75_context.cpp
> b/backend/src/backend/gen75_context.cpp
> index 1f9591e..da1e6d9 100644
> --- a/backend/src/backend/gen75_context.cpp
> +++ b/backend/src/backend/gen75_context.cpp
> @@ -39,13 +39,19 @@ namespace gbe
>      if(kernel->getUseSLM() == false)
>        return;
> 
> -    const GenRegister slm_offset = ra-
> >genReg(GenRegister::ud1grf(ir::ocl::slmoffset));
>      const GenRegister slm_index = GenRegister::ud1grf(0, 0);
> -    //the slm index is hold in r0.0 24-27 bit, in 4K unit, shift left 12 to get byte
> unit
> +    //the slm index is hold in r0.0 24-27 bit, in 4K unit, move it to sr0.1's 8-11
> bits.
>      p->push();
>        p->curr.execWidth = 1;
>        p->curr.predicate = GEN_PREDICATE_NONE;
> -      p->SHR(slm_offset, slm_index, GenRegister::immud(12));
> +      GenRegister sr0 = GenRegister(GEN_ARCHITECTURE_REGISTER_FILE,
> +                                    GEN_ARF_STATE,
> +                                    1,
> +                                    GEN_TYPE_UD,
> +                                    GEN_VERTICAL_STRIDE_8,
> +                                    GEN_WIDTH_8,
> +                                    GEN_HORIZONTAL_STRIDE_1);
> +      p->SHR(sr0, slm_index, GenRegister::immud(16));
>      p->pop();
>    }
> 
> diff --git a/backend/src/backend/gen_insn_selection.cpp
> b/backend/src/backend/gen_insn_selection.cpp
> index adff091..58f913e 100644
> --- a/backend/src/backend/gen_insn_selection.cpp
> +++ b/backend/src/backend/gen_insn_selection.cpp
> @@ -1746,7 +1746,7 @@ namespace gbe
>    }
> 
>    Selection75::Selection75(GenContext &ctx) : Selection(ctx) {
> -    this->opaque->setPatchSLMAddr(true);
> +    this->opaque->setPatchSLMAddr(false);
>    }
> 
>    Selection8::Selection8(GenContext &ctx) : Selection(ctx) {
> --
> 1.8.3.2
> 
> _______________________________________________
> Beignet mailing list
> Beignet at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet