[Beignet] [PATCH] GBE: fixed a potential bug in 64 bit instruction.

[Zhigang Gong]

Current selection vector handling requires the dst/src
vector is starting at dst(0) or src(0).

Signed-off-by: Zhigang Gong <zhigang.gong at intel.com>
---
 backend/src/backend/gen_insn_selection.cpp |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 53038b2..0e2ba3a 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -985,9 +985,9 @@ namespace gbe
     insn->extra.elem = valueNum;
 
     // Only the temporary registers need contiguous allocation
-    dstVector->regNum = elemNum - valueNum;
+    dstVector->regNum = elemNum;
     dstVector->isSrc = 0;
-    dstVector->reg = &insn->dst(1);
+    dstVector->reg = &insn->dst(0);
 
     // Source cannot be scalar (yet)
     srcVector->regNum = 1;
-- 
1.7.9.5