[Beignet] [PATCH 1/2] GBE: prepare to optimize generic selection vector allocation.

Song, Ruiling ruiling.song at intel.com
Sun Feb 23 20:15:13 PST 2014


[Ruiling]: I also got a surprise at first, but seems that all the insn->ID does not consider the new inserted MOVs. So the register intervals still aligned among the registers. I am not sure if there are some side effect, but at least I do not see any.

diff --git a/backend/src/backend/gen_reg_allocation.cpp b/backend/src/backend/gen_reg_allocation.cpp
index 8243f19..4e276c3 100644
--- a/backend/src/backend/gen_reg_allocation.cpp
+++ b/backend/src/backend/gen_reg_allocation.cpp
@@ -292,6 +292,10 @@ namespace gbe
           tmp = selection.replaceDst(vector->insn, regID);
         const VectorLocation location = std::make_pair(vector, regID);
         this->vectorMap.insert(std::make_pair(tmp, location));
+        intervals.push_back(tmp);
+        intervals[tmp].minID = vector->insn->ID;
+        intervals[tmp].maxID = vector->insn->ID;
>>>>>>>>The tmp is dst of mov before vector->insn, so minID should be insn - 1? And if there are some instructions are inserted, so vector->insn->ID is also change, isn't it?







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