[Beignet] [PATCH 0/5] Preparation to do the branching optimization.

Zhigang Gong zhigang.gong at intel.com
Thu Mar 13 18:43:55 PDT 2014


This patchset is a preparation to implement the if/endif + jmpi
to optimize the branching instruction. The previous implementation is
using predication to handle all the channel masking which is really
not good in some cases. And the bool's implementation make things
even more complicate.

This series change the bool's implementation to use normal S16
register and also simplfy the flag usage model.

Zhigang Gong (5):
  GBE: refine the "scalar" register handling.
  GBE: fix the wrong usage of stack pointer and stack buffer.
  GBE: use a uniform style to calculate register size for curbe
    allocation.
  GBE: fix one misusage of flag in forward jump.
  GBE: use S16 vector to represent bool.

 backend/src/backend/context.cpp            | 123 +-----------
 backend/src/backend/context.hpp            |   5 +-
 backend/src/backend/gen_context.cpp        | 130 ++++++++++++-
 backend/src/backend/gen_context.hpp        |   6 +
 backend/src/backend/gen_encoder.cpp        |   9 +-
 backend/src/backend/gen_encoder.hpp        |   2 +-
 backend/src/backend/gen_insn_selection.cpp | 288 ++++++++++++++---------------
 backend/src/backend/gen_insn_selection.hpp |   2 +
 backend/src/backend/gen_reg_allocation.cpp |  24 +--
 backend/src/backend/gen_reg_allocation.hpp |   2 +
 backend/src/backend/program.hpp            |   1 +
 backend/src/ir/context.cpp                 |   4 +-
 backend/src/ir/context.hpp                 |   2 +-
 backend/src/ir/function.hpp                |   4 +-
 backend/src/ir/lowering.cpp                |   3 +-
 backend/src/ir/profile.cpp                 |  65 +++----
 backend/src/ir/profile.hpp                 |  19 +-
 backend/src/ir/register.hpp                |  13 +-
 backend/src/llvm/llvm_gen_backend.cpp      |  27 ++-
 19 files changed, 359 insertions(+), 370 deletions(-)

-- 
1.8.3.2



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