[Beignet] [PATCH 1/8] HSW: align buffer's size to DWORD.

[Yang, Rong R]

Run the buffer test 50+ times, all pass.

-----Original Message-----
From: He Junyan [mailto:junyan.he at inbox.com] 
Sent: Tuesday, May 13, 2014 3:16 PM
To: Yang, Rong R
Cc: beignet at lists.freedesktop.org
Subject: Re: [Beignet] [PATCH 1/8] HSW: align buffer's size to DWORD.

This patch will cause some regression in buffer tests


On Mon, 2014-05-12 at 23:11 +0800, Yang Rong wrote:
> HSW: Byte scattered Read/Write require that the buffer size must be a multiple of 4 bytes.
>      So simply alignment all buffer size to 4. Pass utest compiler_function_constant0.
> 
> Because it is very light work around, align it without not check device.
> 
> Signed-off-by: Yang Rong <rong.r.yang at intel.com>
> ---
>  src/cl_mem.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/src/cl_mem.c b/src/cl_mem.c index 44482f7..5feda74 100644
> --- a/src/cl_mem.c
> +++ b/src/cl_mem.c
> @@ -334,6 +334,10 @@ cl_mem_new_buffer(cl_context ctx,
>      goto error;
>    }
>  
> +  /* HSW: Byte scattered Read/Write has limitation that
> +     the buffer size must be a multiple of 4 bytes. */  sz = 
> + ALIGN(sz, 4);
> +
>    /* Create the buffer in video memory */
>    mem = cl_mem_allocate(CL_MEM_BUFFER_TYPE, ctx, flags, sz, CL_FALSE, &err);
>    if (mem == NULL || err != CL_SUCCESS)