[Beignet] [PATCH] correct L3 cache settings for baytrail

[Zhigang Gong]

I agree with both of you. The gpgpu_l3_config_reg magic number array is
really too confusing to understand.
If those registers' definition are already published (on 01.org's document),
I would like to see a clear single value
assignment for each register with clearly meaningful comment.

Any idea?

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Guo, Yejun
> Sent: Thursday, May 22, 2014 4:39 PM
> To: Song, Ruiling; beignet at lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] correct L3 cache settings for baytrail
> 
> 
> Actually, my original idea is to use static variables inside the function,
just
> changed idea after review function intel_gpgpu_set_L3_gen75
> 
> If you don't object, I'll use scalar variables instead of 'array', it will
be much
> more clear.
> 
> Thanks
> Yejun
> 
> -----Original Message-----
> From: Song, Ruiling
> Sent: Thursday, May 22, 2014 4:27 PM
> To: Guo, Yejun; beignet at lists.freedesktop.org
> Cc: Guo, Yejun
> Subject: RE: [Beignet] [PATCH] correct L3 cache settings for baytrail
> 
> --- a/src/intel/intel_gpgpu.c
> +++ b/src/intel/intel_gpgpu.c
> @@ -309,14 +309,14 @@ static const uint32_t gpgpu_l3_config_reg1[] = {
>    0x00080040, 0x02040040, 0x00800040, 0x01000038,
>    0x02000030, 0x01000038, 0x00000038, 0x00000040,
>    0x0A140091, 0x09100091, 0x08900091, 0x08900091,
> -  0x010000a1
> +  0x010000a1, 0x02040001, 0x02040040
>  };
> 
>  static const uint32_t gpgpu_l3_config_reg2[] = {
>    0x00000000, 0x00000000, 0x00080410, 0x00080410,
>    0x00040410, 0x00040420, 0x00080420, 0x00080020,
>    0x00204080, 0x00244890, 0x00284490, 0x002444A0,
> -  0x00040810
> +  0x00040810, 0x00000000, 0x00000000
>  };
> 
> I would suggest you use another array, don't mixed the configuration, as
> different HW cannot share the configuration table.
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