[Beignet] [patch v2 1/2] enable llvm intrinsic call usub_with_overflow funtion.

[Zhigang Gong]

The patch LGTM, but you forgot to add some meaningful commit log.
And also forgot to add a V2 tag here.

Please don't ignore this type of things next time. Thanks.

On Mon, Nov 03, 2014 at 05:22:03AM +0800, xionghu.luo at intel.com wrote:
> From: Luo Xionghu <xionghu.luo at intel.com>
> 
> Signed-off-by: Luo Xionghu <xionghu.luo at intel.com>
> ---
>  backend/src/llvm/llvm_gen_backend.cpp |   16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
> index bb2c1dd..feb881d 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -2805,9 +2805,23 @@ namespace gbe
>              ctx.LT(dst0Type, overflow, dst0, src1);
>            }
>            break;
> +          case Intrinsic::usub_with_overflow:
> +          {
> +            Type *llvmDstType = I.getType();
> +            GBE_ASSERT(llvmDstType->isStructTy());
> +            ir::Type dst0Type = getType(ctx, llvmDstType->getStructElementType(0));
> +            const ir::Register dst0  = this->getRegister(&I, 0);
> +            const ir::Register src0 = this->getRegister(I.getOperand(0));
> +            const ir::Register src1 = this->getRegister(I.getOperand(1));
> +            ctx.SUB(dst0Type, dst0, src0, src1);
> +
> +            ir::Register overflow = this->getRegister(&I, 1);
> +            const ir::Type unsignedType = makeTypeUnsigned(dst0Type);
> +            ctx.GT(unsignedType, overflow, dst0, src0);
> +          }
> +          break;
>            case Intrinsic::sadd_with_overflow:
>            case Intrinsic::ssub_with_overflow:
> -          case Intrinsic::usub_with_overflow:
>            case Intrinsic::smul_with_overflow:
>            case Intrinsic::umul_with_overflow:
>            NOT_IMPLEMENTED;
> -- 
> 1.7.9.5
> 
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