[Beignet] [PATCH] GBE: disable spill register under simd16 mode.
Zhigang Gong
zhigang.gong at intel.com
Thu Nov 20 20:09:07 PST 2014
Register spilling awlays cost much more than fallback to simd8
which could avoid register spilling or at least reduce the spilled
registers.
Signed-off-by: Zhigang Gong <zhigang.gong at intel.com>
---
backend/src/backend/gen_program.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/backend/src/backend/gen_program.cpp b/backend/src/backend/gen_program.cpp
index 05d830a..46fcb67 100644
--- a/backend/src/backend/gen_program.cpp
+++ b/backend/src/backend/gen_program.cpp
@@ -135,7 +135,6 @@ namespace gbe {
bool limitRegisterPressure;
} codeGenStrategy[] = {
{16, 0, false},
- {16, 10, false},
{8, 0, false},
{8, 8, false},
{8, 16, false},
@@ -151,9 +150,9 @@ namespace gbe {
uint32_t codeGen = 0;
GenContext *ctx = NULL;
if (fn->getSimdWidth() == 8) {
- codeGen = 2;
+ codeGen = 1;
} else if (fn->getSimdWidth() == 16) {
- codeGenNum = 2;
+ codeGenNum = 1;
} else if (fn->getSimdWidth() == 0) {
codeGen = 0;
} else
--
1.8.3.2
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