[Beignet] [PATCH] Fix AUX buffer for really page aligned

[Zhenyu Wang]

Apply ALIGN() for aux buffer size from beginning has no effect on
final target size. Move to the end of all state offsets set for
alignment.

Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
---
 src/intel/intel_gpgpu.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c
index 105a077..98b32bf 100644
--- a/src/intel/intel_gpgpu.c
+++ b/src/intel/intel_gpgpu.c
@@ -759,8 +759,6 @@ intel_gpgpu_state_init(intel_gpgpu_t *gpgpu,
     dri_bo_unreference(gpgpu->aux_buf.bo);
   gpgpu->aux_buf.bo = NULL;
 
-  //surface heap must be 4096 bytes aligned because state base address use 20bit for the address
-  size_aux = ALIGN(size_aux, 4096);
   gpgpu->aux_offset.surface_heap_offset = size_aux;
   size_aux += sizeof(surface_heap_t);
 
@@ -784,7 +782,10 @@ intel_gpgpu_state_init(intel_gpgpu_t *gpgpu,
   gpgpu->aux_offset.sampler_border_color_state_offset = size_aux;
   size_aux += GEN_MAX_SAMPLERS * sizeof(gen7_sampler_border_color_t);
 
-  bo = dri_bo_alloc(gpgpu->drv->bufmgr, "AUX_BUFFER", size_aux, 0);
+  //surface heap must be 4096 bytes aligned because state base address use 20bit for the address
+  size_aux = ALIGN(size_aux, 4096);
+
+  bo = dri_bo_alloc(gpgpu->drv->bufmgr, "AUX_BUFFER", size_aux, 4096);
   if (!bo || dri_bo_map(bo, 1) != 0) {
     fprintf(stderr, "%s:%d: %s.\n", __FILE__, __LINE__, strerror(errno));
     if (bo)
-- 
2.1.1