[Beignet] [PATCH 09/18] Backend: add line and column to ASM output.
junyan.he at inbox.com
junyan.he at inbox.com
Thu Dec 24 03:02:01 PST 2015
From: Junyan He <junyan.he at linux.intel.com>
Signed-off-by: Junyan He <junyan.he at linux.intel.com>
---
backend/src/backend/gen_context.cpp | 13 ++-----------
backend/src/backend/gen_encoder.cpp | 8 ++------
backend/src/backend/program.cpp | 2 +-
backend/src/llvm/llvm_gen_backend.cpp | 1 -
4 files changed, 5 insertions(+), 19 deletions(-)
diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index a2e11a4..6edad4f 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -94,10 +94,6 @@ namespace gbe
return i;
}
- extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp
-#define SET_GENINSN_DBGINFO(I) \
- if(OCL_DEBUGINFO) p->DBGInfo = I.DBGInfo;
-
void GenContext::emitInstructionStream(void) {
// Emit Gen ISA
for (auto &block : *sel->blockList)
@@ -107,7 +103,7 @@ namespace gbe
// no more virtual register here in that part of the code generation
GBE_ASSERT(insn.state.physicalFlag);
p->curr = insn.state;
- SET_GENINSN_DBGINFO(insn);
+ p->DBGInfo = insn.DBGInfo;
switch (opcode) {
#define DECL_SELECTION_IR(OPCODE, FAMILY) \
case SEL_OP_##OPCODE: this->emit##FAMILY(insn); break;
@@ -121,7 +117,6 @@ namespace gbe
for(int i = 0; i < 8; i++)
p->NOP();
}
-#undef SET_GENINSN_DBGINFO
bool GenContext::patchBranches(void) {
using namespace ir;
@@ -3221,9 +3216,6 @@ do { \
if (OCL_OUTPUT_ASM)
outputAssembly(stdout, genKernel);
- if (OCL_DEBUGINFO)
- outputAssembly(stdout, genKernel);
-
if (this->asmFileName) {
FILE *asmDumpStream = fopen(this->asmFileName, "a");
if (asmDumpStream) {
@@ -3256,8 +3248,7 @@ do { \
}
}
- if (OCL_DEBUGINFO)
- fprintf(file, "[%3i,%3i]", p->storedbg[insnID].line, p->storedbg[insnID].col);
+ fprintf(file, "[%3i,%3i]", p->storedbg[insnID].line, p->storedbg[insnID].col);
fprintf(file, " (%8i) ", insnID);
pCom = (GenCompactInstruction*)&p->store[insnID];
diff --git a/backend/src/backend/gen_encoder.cpp b/backend/src/backend/gen_encoder.cpp
index ea32dad..f6780b8 100644
--- a/backend/src/backend/gen_encoder.cpp
+++ b/backend/src/backend/gen_encoder.cpp
@@ -593,14 +593,10 @@ namespace gbe
}
}
- extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp
void GenEncoder::setDBGInfo(DebugInfo in, bool hasHigh)
{
- if(OCL_DEBUGINFO)
- {
- storedbg.push_back(in);
- if(hasHigh) storedbg.push_back(in);
- }
+ storedbg.push_back(in);
+ if(hasHigh) storedbg.push_back(in);
}
GenCompactInstruction *GenEncoder::nextCompact(uint32_t opcode) {
diff --git a/backend/src/backend/program.cpp b/backend/src/backend/program.cpp
index 8b703f3..232a79e 100644
--- a/backend/src/backend/program.cpp
+++ b/backend/src/backend/program.cpp
@@ -537,7 +537,7 @@ namespace gbe {
program->CleanLlvmResource();
}
- BVAR(OCL_DEBUGINFO, false);
+BVAR(OCL_DEBUGINFO, false);
#ifdef GBE_COMPILER_AVAILABLE
static bool buildModuleFromSource(const char *source, llvm::Module** out_module, llvm::LLVMContext* llvm_ctx,
std::string dumpLLVMFileName, std::string dumpSPIRBinaryName, std::vector<std::string>& options, size_t stringSize, char *err,
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
index 79ae1fd..34fc0fa 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -103,7 +103,6 @@ using namespace llvm;
namespace gbe
{
- extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp
/*! Gen IR manipulates only scalar types */
static bool isScalarType(const Type *type)
{
--
1.9.1
More information about the Beignet
mailing list