[Beignet] [PATCH] Correct the bit fields error for indirect address of Gen8

Zhigang Gong zhigang.gong at linux.intel.com
Tue Feb 10 17:43:41 PST 2015


LGTM, will push latter, thanks.

On Tue, Feb 10, 2015 at 04:14:35PM +0800, junyan.he at inbox.com wrote:
> From: Junyan He <junyan.he at linux.intel.com>
> 
> Signed-off-by: Junyan He <junyan.he at linux.intel.com>
> ---
>  backend/src/backend/gen8_instruction.hpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/backend/src/backend/gen8_instruction.hpp b/backend/src/backend/gen8_instruction.hpp
> index 48f9795..5cf1032 100644
> --- a/backend/src/backend/gen8_instruction.hpp
> +++ b/backend/src/backend/gen8_instruction.hpp
> @@ -96,9 +96,9 @@ union Gen8NativeInstruction
>          uint32_t dest_reg_type:4;
>          uint32_t src0_reg_file:2;
>          uint32_t src0_reg_type:4;
> -        int dest_indirect_offset_9:1;        /* offset against the deref'd address reg bit9 */
> +        int dest_indirect_offset_9:1;      /* offset against the deref'd address reg bit9 */
>          int dest_indirect_offset:9;        /* offset against the deref'd address reg bit0-8 */
> -        uint32_t dest_subreg_nr:3; /* subnr for the address reg a0.x */
> +        uint32_t dest_subreg_nr:4;         /* subnr for the address reg a0.x */
>          uint32_t dest_horiz_stride:2;
>          uint32_t dest_address_mode:1;
>        } ia1;
> -- 
> 1.9.1
> 
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