[Beignet] [PATCH v2] fix llvm.trunc.float instruction bug.

[Song, Ruiling]

Should be RNDZ. The llvm.trunc is same as libm trunc(), which means rounding toward zero.

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> xionghu.luo at intel.com
> Sent: Thursday, January 15, 2015 7:05 PM
> To: beignet at lists.freedesktop.org
> Cc: Luo, Xionghu
> Subject: [Beignet] [PATCH v2] fix llvm.trunc.float instruction bug.
> 
> From: Luo <xionghu.luo at intel.com>
> 
> float to float trunc should use RNDU IR instruction.
> 
> v2: fix typo. should be RNDD instead of RNDU.
> Signed-off-by: Luo <xionghu.luo at intel.com>
> ---
>  backend/src/llvm/llvm_gen_backend.cpp | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp
> b/backend/src/llvm/llvm_gen_backend.cpp
> index 53dec0a..ee5b6a3 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -3310,11 +3310,9 @@ error:
>              ir::Type srcType = getType(ctx, llvmSrcType);
>              GBE_ASSERT(srcType == dstType);
> 
> -            const ir::Register tmp = ctx.reg(getFamily(ir::TYPE_S32));
>              const ir::Register dst = this->getRegister(&I);
>              const ir::Register src = this->getRegister(I.getOperand(0));
> -            ctx.CVT(ir::TYPE_S32, srcType, tmp, src);
> -            ctx.CVT(dstType, ir::TYPE_S32, dst, tmp);
> +            ctx.RNDD(dstType, dst, src);
>            }
>            break;
>            case Intrinsic::copysign:
> --
> 1.9.1
> 
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