[Beignet] [PATCH 1/2] libocl: Refine char/short abs() implementation.

Zhigang Gong zhigang.gong at linux.intel.com
Wed Jan 28 20:15:50 PST 2015


LGTM, will push latter, thanks.

On Wed, Jan 28, 2015 at 03:07:58PM +0800, Ruiling Song wrote:
> We don't need to convert char/short to int when calling abs().
> 
> Signed-off-by: Ruiling Song <ruiling.song at intel.com>
> ---
>  backend/src/backend/gen_insn_selection.cpp  |    9 +++------
>  backend/src/libocl/tmpl/ocl_integer.tmpl.cl |    4 +++-
>  backend/src/llvm/llvm_gen_backend.cpp       |    2 +-
>  3 files changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
> index 628fa2f..73fdd1f 100644
> --- a/backend/src/backend/gen_insn_selection.cpp
> +++ b/backend/src/backend/gen_insn_selection.cpp
> @@ -2071,13 +2071,10 @@ namespace gbe
>          }
>          switch (opcode) {
>            case ir::OP_ABS:
> -            if (insn.getType() == ir::TYPE_S32) {
> -              const GenRegister src_ = GenRegister::retype(src, GEN_TYPE_D);
> -              const GenRegister dst_ = GenRegister::retype(dst, GEN_TYPE_D);
> +            {
> +              const GenRegister src_ = GenRegister::retype(src, getGenType(insnType));
> +              const GenRegister dst_ = GenRegister::retype(dst, getGenType(insnType));
>                sel.MOV(dst_, GenRegister::abs(src_));
> -            } else {
> -              GBE_ASSERT(insn.getType() == ir::TYPE_FLOAT);
> -              sel.MOV(dst, GenRegister::abs(src));
>              }
>              break;
>            case ir::OP_MOV:
> diff --git a/backend/src/libocl/tmpl/ocl_integer.tmpl.cl b/backend/src/libocl/tmpl/ocl_integer.tmpl.cl
> index 6da0bab..b46cf25 100644
> --- a/backend/src/libocl/tmpl/ocl_integer.tmpl.cl
> +++ b/backend/src/libocl/tmpl/ocl_integer.tmpl.cl
> @@ -330,7 +330,9 @@ OVERLOADABLE ulong rhadd(ulong x, ulong y) {
>    return __gen_ocl_rhadd(x, y);
>  }
>  
> -int __gen_ocl_abs(int x);
> +PURE CONST OVERLOADABLE char __gen_ocl_abs(char x);
> +PURE CONST OVERLOADABLE short __gen_ocl_abs(short x);
> +PURE CONST OVERLOADABLE int __gen_ocl_abs(int x);
>  #define DEC(TYPE) OVERLOADABLE u##TYPE abs(TYPE x) { return (u##TYPE) __gen_ocl_abs(x); }
>  DEC(int)
>  DEC(short)
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
> index 0b1863f..e95ebe6 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -3402,7 +3402,7 @@ error:
>            {
>              const ir::Register src = this->getRegister(*AI);
>              const ir::Register dst = this->getRegister(&I);
> -            ctx.ALU1(ir::OP_ABS, ir::TYPE_S32, dst, src);
> +            ctx.ALU1(ir::OP_ABS, getType(ctx, (*AI)->getType()), dst, src);
>              break;
>            }
>            case GEN_OCL_SIMD_ALL:
> -- 
> 1.7.10.4
> 
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