[Beignet] [PATCH] replace sin/cos with llvm intrinsic.

Luo, Xionghu xionghu.luo at intel.com
Thu Jan 29 22:13:27 PST 2015


Sorry that some file changes missed in this patch.
Will send new patchset later.

Luo Xionghu
Best Regards

-----Original Message-----
From: Zhigang Gong [mailto:zhigang.gong at linux.intel.com] 
Sent: Friday, January 30, 2015 12:55 PM
To: Luo, Xionghu
Cc: beignet at lists.freedesktop.org
Subject: Re: [Beignet] [PATCH] replace sin/cos with llvm intrinsic.

Xionghu,

Before you replace all the __gen_ocl_sin/__gen_ocl_cos to llvm.sin/llvm.cos, you can't remove GEN_OCL_COS/GEN_OCL_SIN.
 
On Fri, Jan 30, 2015 at 11:46:50AM +0800, xionghu.luo at intel.com wrote:
> From: Luo Xionghu <xionghu.luo at intel.com>
> 
> replace sin/cos non-stardard math intrinsic call with llvm intrinsic.
> translate them to llvm.xxx for fast path, refine the calls to call 
> emitUnaryCallInst.
> 
> Signed-off-by: Luo Xionghu <xionghu.luo at intel.com>
> ---
>  backend/src/llvm/llvm_gen_backend.cpp | 59 
> ++++++++++-------------------------
>  1 file changed, 16 insertions(+), 43 deletions(-)
> 
> diff --git a/backend/src/llvm/llvm_gen_backend.cpp 
> b/backend/src/llvm/llvm_gen_backend.cpp
> index d10d5c0..34c571e 100644
> --- a/backend/src/llvm/llvm_gen_backend.cpp
> +++ b/backend/src/llvm/llvm_gen_backend.cpp
> @@ -2794,13 +2794,13 @@ error:
>            case Intrinsic::bswap:
>              this->newRegister(&I);
>            break;
> +          case Intrinsic::fabs:
>            case Intrinsic::sqrt:
>            case Intrinsic::ceil:
>            case Intrinsic::fma:
>            case Intrinsic::trunc:
> -            this->newRegister(&I);
> -          break;
> -          case Intrinsic::fabs:
> +          case Intrinsic::sin:
> +          case Intrinsic::cos:
>              this->newRegister(&I);
>            break;
>            default:
> @@ -2854,8 +2854,6 @@ error:
>        case GEN_OCL_FBH:
>        case GEN_OCL_FBL:
>        case GEN_OCL_CBIT:
> -      case GEN_OCL_COS:
> -      case GEN_OCL_SIN:
>        case GEN_OCL_SQR:
>        case GEN_OCL_RSQ:
>        case GEN_OCL_LOG:
> @@ -3056,6 +3054,13 @@ error:
>      if (Function *F = I.getCalledFunction()) {
>        if (F->getIntrinsicID() != 0) {
>          const ir::Function &fn = ctx.getFunction();
> +
> +        // Get the function arguments
> +        CallSite CS(&I);
> +        CallSite::arg_iterator AI = CS.arg_begin(); #if GBE_DEBUG
> +        CallSite::arg_iterator AE = CS.arg_end(); #endif /* GBE_DEBUG 
> +*/
>          switch (F->getIntrinsicID()) {
>            case Intrinsic::stacksave:
>            {
> @@ -3212,29 +3217,6 @@ error:
>              }
>            }
>            break;
> -          case Intrinsic::sqrt:
> -          {
> -            const ir::Register dst = this->getRegister(&I);
> -            const ir::Register src = this->getRegister(I.getOperand(0));
> -            ctx.ALU1(ir::OP_SQR, ir::TYPE_FLOAT, dst, src);
> -          }
> -          break;
> -          case Intrinsic::fabs:
> -          {
> -            ir::Type srcType = getType(ctx, I.getType());
> -            const ir::Register dst = this->getRegister(&I);
> -            const ir::Register src = this->getRegister(I.getOperand(0));
> -            ctx.ALU1(ir::OP_ABS, srcType, dst, src);
> -          }
> -          break;
> -          case Intrinsic::ceil:
> -          {
> -            ir::Type srcType = getType(ctx, I.getType());
> -            const ir::Register dst = this->getRegister(&I);
> -            const ir::Register src = this->getRegister(I.getOperand(0));
> -            ctx.ALU1(ir::OP_RNDU, srcType, dst, src);
> -          }
> -          break;
>            case Intrinsic::ctlz:
>            {
>              Type *llvmDstType = I.getType(); @@ -3286,19 +3268,12 @@ 
> error:
>              ctx.MAD(srcType, dst, src0, src1, src2);
>            }
>            break;
> -          case Intrinsic::trunc:
> -          {
> -            Type *llvmDstType = I.getType();
> -            Type *llvmSrcType = I.getOperand(0)->getType();
> -            ir::Type dstType = getType(ctx, llvmDstType);
> -            ir::Type srcType = getType(ctx, llvmSrcType);
> -            GBE_ASSERT(srcType == dstType);
> -
> -            const ir::Register dst = this->getRegister(&I);
> -            const ir::Register src = this->getRegister(I.getOperand(0));
> -            ctx.RNDZ(dstType, dst, src);
> -          }
> -          break;
> +          case Intrinsic::sqrt: this->emitUnaryCallInst(I,CS,ir::OP_SQR); break;
> +          case Intrinsic::ceil: this->emitUnaryCallInst(I,CS,ir::OP_RNDU); break;
> +          case Intrinsic::fabs: this->emitUnaryCallInst(I,CS,ir::OP_ABS); break;
> +          case Intrinsic::trunc: this->emitUnaryCallInst(I,CS,ir::OP_RNDZ); break;
> +          case Intrinsic::sin: this->emitUnaryCallInst(I,CS,ir::OP_SIN); break;
> +          case Intrinsic::cos: 
> + this->emitUnaryCallInst(I,CS,ir::OP_COS); break;
>            default: NOT_IMPLEMENTED;
>          }
>        } else {
> @@ -3367,8 +3342,6 @@ error:
>              ctx.REGION(dst, src, x.getIntegerValue());
>              break;
>            }
> -          case GEN_OCL_COS: this->emitUnaryCallInst(I,CS,ir::OP_COS); break;
> -          case GEN_OCL_SIN: this->emitUnaryCallInst(I,CS,ir::OP_SIN); break;
>            case GEN_OCL_LOG: this->emitUnaryCallInst(I,CS,ir::OP_LOG); break;
>            case GEN_OCL_EXP: this->emitUnaryCallInst(I,CS,ir::OP_EXP); break;
>            case GEN_OCL_SQR: this->emitUnaryCallInst(I,CS,ir::OP_SQR); 
> break;
> --
> 1.9.1
> 
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