[Beignet] [V2 PATCH 2/3] runtime: Add cl device's standalone extension.

junyan.he at inbox.com junyan.he at inbox.com
Mon Jul 6 00:14:00 PDT 2015


From: Junyan He <junyan.he at linux.intel.com>

The cl device may have different extensions from the
platform. We will add some items based on the platform
extensions.

Signed-off-by: Junyan He <junyan.he at linux.intel.com>
---
 src/cl_device_id.c  | 18 ++++++++----------
 src/cl_device_id.h  |  2 +-
 src/cl_extensions.c | 24 ++++++++++++++----------
 src/cl_extensions.h |  2 +-
 4 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/src/cl_device_id.c b/src/cl_device_id.c
index 7956646..f995550 100644
--- a/src/cl_device_id.c
+++ b/src/cl_device_id.c
@@ -399,10 +399,10 @@ baytrail_t_device_break:
       DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell ULX GT1");
 brw_gt1_break:
       /* For Gen8 and later, half float is suppported and we will enable cl_khr_fp16. */
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_brw_gt1_device.vendor_id = device_id;
       intel_brw_gt1_device.platform = cl_get_platform_default();
       ret = &intel_brw_gt1_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_BROADWLL_M_GT2:
@@ -416,10 +416,10 @@ brw_gt1_break:
     case PCI_CHIP_BROADWLL_U_GT2:
       DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics BroadWell ULX GT2");
 brw_gt2_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_brw_gt2_device.vendor_id = device_id;
       intel_brw_gt2_device.platform = cl_get_platform_default();
       ret = &intel_brw_gt2_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_BROADWLL_M_GT3:
@@ -433,10 +433,10 @@ brw_gt2_break:
     case PCI_CHIP_BROADWLL_U_GT3:
       DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell ULX GT2");
 brw_gt3_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_brw_gt3_device.vendor_id = device_id;
       intel_brw_gt3_device.platform = cl_get_platform_default();
       ret = &intel_brw_gt3_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_CHV_0:
@@ -445,10 +445,10 @@ brw_gt3_break:
     case PCI_CHIP_CHV_3:
       DECL_INFO_STRING(chv_break, intel_chv_device, name, "Intel(R) HD Graphics Cherryview");
 chv_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_chv_device.vendor_id = device_id;
       intel_chv_device.platform = cl_get_platform_default();
       ret = &intel_chv_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
 
@@ -463,10 +463,10 @@ chv_break:
     case PCI_CHIP_SKYLAKE_SRV_GT1:
       DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Server GT1");
 skl_gt1_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_skl_gt1_device.vendor_id = device_id;
       intel_skl_gt1_device.platform = cl_get_platform_default();
       ret = &intel_skl_gt1_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_SKYLAKE_ULT_GT2:
@@ -482,10 +482,10 @@ skl_gt1_break:
     case PCI_CHIP_SKYLAKE_SRV_GT2:
       DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Server GT2");
 skl_gt2_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_skl_gt2_device.vendor_id = device_id;
       intel_skl_gt2_device.platform = cl_get_platform_default();
       ret = &intel_skl_gt2_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_SKYLAKE_ULT_GT3:
@@ -495,10 +495,10 @@ skl_gt2_break:
     case PCI_CHIP_SKYLAKE_SRV_GT3:
       DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Server GT3");
 skl_gt3_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_skl_gt3_device.vendor_id = device_id;
       intel_skl_gt3_device.platform = cl_get_platform_default();
       ret = &intel_skl_gt3_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_SKYLAKE_HALO_GT4:
@@ -506,10 +506,10 @@ skl_gt3_break:
     case PCI_CHIP_SKYLAKE_SRV_GT4:
       DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Server GT4");
 skl_gt4_break:
-      cl_intel_platform_enable_fp16_extension(cl_get_platform_default());
       intel_skl_gt4_device.vendor_id = device_id;
       intel_skl_gt4_device.platform = cl_get_platform_default();
       ret = &intel_skl_gt4_device;
+      cl_intel_platform_enable_fp16_extension(ret);
       break;
 
     case PCI_CHIP_SANDYBRIDGE_BRIDGE:
@@ -667,8 +667,6 @@ cl_get_device_ids(cl_platform_id    platform,
       *num_devices = 1;
     if (devices) {
       *devices = device;
-      (*devices)->extensions = cl_get_platform_default()->extensions;
-      (*devices)->extensions_sz = cl_get_platform_default()->extensions_sz;
     }
     return CL_SUCCESS;
   }
diff --git a/src/cl_device_id.h b/src/cl_device_id.h
index 2a35628..6daa31c 100644
--- a/src/cl_device_id.h
+++ b/src/cl_device_id.h
@@ -94,7 +94,7 @@ struct _cl_device_id {
   const char *version;
   const char *profile;
   const char *opencl_c_version;
-  const char *extensions;
+  const char extensions[256];
   const char *driver_version;
   const char *built_in_kernels;
   size_t name_sz;
diff --git a/src/cl_extensions.c b/src/cl_extensions.c
index 9044284..a34aaca 100644
--- a/src/cl_extensions.c
+++ b/src/cl_extensions.c
@@ -5,6 +5,7 @@
 #endif
 
 #include "cl_platform_id.h"
+#include "cl_device_id.h"
 #include "cl_internals.h"
 #include "CL/cl.h"
 #include "cl_utils.h"
@@ -72,7 +73,7 @@ process_extension_str(cl_extensions_t *extensions)
   int str_offset = 0;
   int id;
 
-  extensions->ext_str[str_max-1] = '\0';
+  memset(extensions->ext_str, 0, sizeof(extensions->ext_str));
 
   for(id = 0; id < cl_khr_extension_id_max; id++)
   {
@@ -95,21 +96,24 @@ process_extension_str(cl_extensions_t *extensions)
 
 
 LOCAL void
-cl_intel_platform_enable_fp16_extension(cl_platform_id intel_platform)
+cl_intel_platform_enable_fp16_extension(cl_device_id device)
 {
-  cl_extensions_t *extensions = &intel_platform_extensions;
+  cl_extensions_t new_ext;
+  cl_platform_id pf = device->platform;
   int id;
+  assert(pf);
 
-  for(id = OPT1_EXT_START_ID; id <= OPT1_EXT_END_ID; id++)
-  {
+  memcpy(&new_ext, pf->internal_extensions, sizeof(new_ext));
+
+  for(id = OPT1_EXT_START_ID; id <= OPT1_EXT_END_ID; id++) {
     if (id == EXT_ID(khr_fp16))
-      extensions->extensions[id].base.ext_enabled = 1;
+      new_ext.extensions[id].base.ext_enabled = 1;
   }
 
-  process_extension_str(extensions);
-  intel_platform->internal_extensions = &intel_platform_extensions;
-  intel_platform->extensions = intel_platform_extensions.ext_str;
-  intel_platform->extensions_sz = strlen(intel_platform->extensions) + 1;
+  process_extension_str(&new_ext);
+
+  memcpy((char*)device->extensions, new_ext.ext_str, sizeof(device->extensions));
+  device->extensions_sz = strlen(new_ext.ext_str) + 1;
 }
 
 LOCAL void
diff --git a/src/cl_extensions.h b/src/cl_extensions.h
index b1154a2..426986c 100644
--- a/src/cl_extensions.h
+++ b/src/cl_extensions.h
@@ -95,4 +95,4 @@ typedef struct cl_extensions {
 extern void
 cl_intel_platform_extension_init(cl_platform_id intel_platform);
 extern void
-cl_intel_platform_enable_fp16_extension(cl_platform_id intel_platform);
+cl_intel_platform_enable_fp16_extension(cl_device_id device);
-- 
1.9.1



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