[Beignet] [PATCH] BDW: override GenContext::patchBranches.

[Yang Rong]

BDW/CHV/SKL's jip and uip have change to 32 bit. Need not check jip and uip
range when patch branches.

Signed-off-by: Yang Rong <rong.r.yang at intel.com>
---
 backend/src/backend/gen8_context.cpp | 18 ++++++++++++++++++
 backend/src/backend/gen8_context.hpp |  2 ++
 backend/src/backend/gen_context.hpp  |  2 +-
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/backend/src/backend/gen8_context.cpp b/backend/src/backend/gen8_context.cpp
index 69d3916..66bb54a 100644
--- a/backend/src/backend/gen8_context.cpp
+++ b/backend/src/backend/gen8_context.cpp
@@ -51,6 +51,24 @@ namespace gbe
     this->sel = GBE_NEW(Selection8, *this);
   }
 
+  bool Gen8Context::patchBranches(void) {
+    using namespace ir;
+    for (auto pair : branchPos2) {
+      const LabelIndex label = pair.first;
+      const int32_t insnID = pair.second;
+      const int32_t targetID = labelPos.find(label)->second;
+      p->patchJMPI(insnID, (targetID - insnID), 0);
+    }
+    for (auto pair : branchPos3) {
+      const LabelPair labelPair = pair.first;
+      const int32_t insnID = pair.second;
+      const int32_t jip = labelPos.find(labelPair.l0)->second;
+      const int32_t uip = labelPos.find(labelPair.l1)->second;
+      p->patchJMPI(insnID, jip - insnID, uip - insnID);
+    }
+    return true;
+  }
+
   void Gen8Context::emitUnaryInstruction(const SelectionInstruction &insn)
   {
     switch (insn.opcode) {
diff --git a/backend/src/backend/gen8_context.hpp b/backend/src/backend/gen8_context.hpp
index 8827955..4f164ce 100644
--- a/backend/src/backend/gen8_context.hpp
+++ b/backend/src/backend/gen8_context.hpp
@@ -47,6 +47,8 @@ namespace gbe
     }
     /*! Get the pointer argument size for curbe alloc */
     virtual uint32_t getPointerSize(void) { return 8; }
+    /*! Set the correct target values for the branches */
+    virtual bool patchBranches(void);
 
     virtual void emitUnaryInstruction(const SelectionInstruction &insn);
     virtual void emitUnaryWithTempInstruction(const SelectionInstruction &insn);
diff --git a/backend/src/backend/gen_context.hpp b/backend/src/backend/gen_context.hpp
index a85657c..d387387 100644
--- a/backend/src/backend/gen_context.hpp
+++ b/backend/src/backend/gen_context.hpp
@@ -90,7 +90,7 @@ namespace gbe
     /*! Emit the instructions */
     void emitInstructionStream(void);
     /*! Set the correct target values for the branches */
-    bool patchBranches(void);
+    virtual bool patchBranches(void);
     /*! Forward ir::Function isSpecialReg method */
     INLINE bool isSpecialReg(ir::Register reg) const {
       return fn.isSpecialReg(reg);
-- 
1.8.3.2