[Beignet] [PATCH] add comments to explain 32bit is enough to represent w+hstrid+vstride
Yang, Rong R
rong.r.yang at intel.com
Mon Nov 2 20:23:21 PST 2015
LGTM, thanks.
> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Guo Yejun
> Sent: Friday, October 23, 2015 3:10
> To: beignet at lists.freedesktop.org
> Cc: Guo, Yejun
> Subject: [Beignet] [PATCH] add comments to explain 32bit is enough to
> represent w+hstrid+vstride
>
> Signed-off-by: Guo Yejun <yejun.guo at intel.com>
> ---
> backend/src/backend/gen_insn_selection_optimize.cpp | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/backend/src/backend/gen_insn_selection_optimize.cpp
> b/backend/src/backend/gen_insn_selection_optimize.cpp
> index fffc8b0..8df531c 100644
> --- a/backend/src/backend/gen_insn_selection_optimize.cpp
> +++ b/backend/src/backend/gen_insn_selection_optimize.cpp
> @@ -27,6 +27,10 @@ namespace gbe
> uint32_t offsetInByte = base;
> for (uint32_t j = 0; j < width; ++j) {
> uint32_t offsetInType = offsetInByte / elementSize;
> + //it is possible that offsetInType > 32, it doesn't matter even elements
> is 32 bit.
> + //the reseason is that if one instruction span several registers,
> + //the other registers' visit pattern is same as first register if the vstride is
> normal(width * hstride)
> + assert(vstride == width * hstride);
> elements |= (1 << offsetInType);
> offsetInByte += hstride * elementSize;
> }
> --
> 1.9.1
>
> _______________________________________________
> Beignet mailing list
> Beignet at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/beignet
More information about the Beignet
mailing list