[Beignet] [PATCH V2 2/5] GBE/DebugInfo: Pass debug info :llvm IR => GEN IR

Bai Yannan yannan.bai at intel.com
Tue Nov 17 18:43:02 PST 2015


    1. Add a DebugInfo type structure DBGInfo into context class, storing debug information.
    2. Add a DebugInfo type structure DBGInfo in Instruction class, storing debug infomation.
    3. Pass debug information firstly from llvm IR to Context, then to GEN IR when emiting, if OCL_DEBUGINFO is true.

Signed-off-by: Yannan Bai <yannan.bai at intel.com>
Signed-off-by: Meng Lv <meng.lv at intel.com>
---
 backend/src/ir/context.cpp            |  1 +
 backend/src/ir/context.hpp            |  2 ++
 backend/src/ir/instruction.hpp        |  2 ++
 backend/src/llvm/llvm_gen_backend.cpp | 21 ++++++++++++++++++++-
 4 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/backend/src/ir/context.cpp b/backend/src/ir/context.cpp
index 3f52b17..e4aac08 100644
--- a/backend/src/ir/context.cpp
+++ b/backend/src/ir/context.cpp
@@ -162,6 +162,7 @@ namespace ir {
     // Append the instruction in the stream
     Instruction *insnPtr = fn->newInstruction(insn);
     bb->append(*insnPtr);
+    insnPtr->setDBGInfo(this->DBGInfo);
 #if GBE_DEBUG
     std::string whyNot;
     if(getUnit().getValid())
diff --git a/backend/src/ir/context.hpp b/backend/src/ir/context.hpp
index ab0d8b5..65864da 100644
--- a/backend/src/ir/context.hpp
+++ b/backend/src/ir/context.hpp
@@ -190,6 +190,7 @@ namespace ir {
     }
 
     void appendSurface(uint8_t bti, Register reg) { fn->appendSurface(bti, reg); }
+    void setDBGInfo(DebugInfo in) { DBGInfo = in; }
 
   protected:
     /*! A block must be started with a label */
@@ -214,6 +215,7 @@ namespace ir {
       vector<uint8_t> *usedLabels; //!< Store all labels that are defined
     };
     vector<StackElem> fnStack;     //!< Stack of functions still to finish
+    DebugInfo DBGInfo;
     GBE_CLASS(Context);
   };
 
diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp
index 6ed8893..351ecda 100644
--- a/backend/src/ir/instruction.hpp
+++ b/backend/src/ir/instruction.hpp
@@ -192,6 +192,7 @@ namespace ir {
     void remove(void);
     /* Insert the instruction after the previous one. */
     void insert(Instruction *prev, Instruction ** new_ins = NULL);
+    void setDBGInfo(DebugInfo in) { DBGInfo = in; }
     /*! Indicates if the instruction belongs to instruction type T. Typically, T
      *  can be BinaryInstruction, UnaryInstruction, LoadInstruction and so on
      */
@@ -201,6 +202,7 @@ namespace ir {
     /*! max_src used by vme for payload passing and setting */
     static const uint32_t MAX_SRC_NUM = 40;
     static const uint32_t MAX_DST_NUM = 32;
+    DebugInfo DBGInfo;
   protected:
     BasicBlock *parent;      //!< The basic block containing the instruction
     GBE_CLASS(Instruction);  //!< Use internal allocators
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
index 858bd49..6e4945e 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -83,6 +83,8 @@
 #include "sys/cvar.hpp"
 #include "backend/program.h"
 #include <sstream>
+#include "llvm/IR/DebugLoc.h"
+#include "llvm/IR/DebugInfo.h"
 
 /* Not defined for LLVM 3.0 */
 #if !defined(LLVM_VERSION_MAJOR)
@@ -101,6 +103,7 @@ using namespace llvm;
 
 namespace gbe
 {
+  extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp
   /*! Gen IR manipulates only scalar types */
   static bool isScalarType(const Type *type)
   {
@@ -673,6 +676,7 @@ namespace gbe
     void emitUnalignedDQLoadStore(ir::Register ptr, Value *llvmValues, ir::AddressSpace addrSpace, ir::Register bti, bool isLoad, bool dwAligned, bool fixedBTI);
     void visitInstruction(Instruction &I) {NOT_SUPPORTED;}
     private:
+      void setDebugInfo_CTX(llvm::Instruction * insn); // store the debug infomation in context for subsequently passing to Gen insn
       ir::ImmediateIndex processConstantImmIndexImpl(Constant *CPV, int32_t index = 0u);
       template <typename T, typename P = T>
       ir::ImmediateIndex processSeqConstant(ConstantDataSequential *seq,
@@ -1781,7 +1785,13 @@ namespace gbe
   void GenWriter::emitBasicBlock(BasicBlock *BB) {
     GBE_ASSERT(labelMap.find(BB) != labelMap.end());
     ctx.LABEL(labelMap[BB]);
-    for (auto II = BB->begin(), E = BB->end(); II != E; ++II) visit(*II);
+    for (auto II = BB->begin(), E = BB->end(); II != E; ++II) {
+      if(OCL_DEBUGINFO) {
+        llvm::Instruction * It = dyn_cast<llvm::Instruction>(II);
+        setDebugInfo_CTX(It);
+      }
+      visit(*II);
+    }
   }
 
   void GenWriter::emitMovForPHI(BasicBlock *curr, BasicBlock *succ) {
@@ -1848,6 +1858,15 @@ namespace gbe
     }
   }
 
+  void GenWriter::setDebugInfo_CTX(llvm::Instruction * insn)
+  {
+    llvm::DebugLoc dg = insn->getDebugLoc();
+    DebugInfo dbginfo;
+    dbginfo.line = dg.getLine();
+    dbginfo.col = dg.getCol();
+    ctx.setDBGInfo(dbginfo);
+  }
+
   void GenWriter::emitFunctionPrototype(Function &F)
   {
     GBE_ASSERTM(F.hasStructRetAttr() == false,
-- 
1.9.1



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