[Beignet] [Patch v2] GBE: Don't try to remove instructions when liveness is in dynamic update phase.
Yang, Rong R
rong.r.yang at intel.com
Thu Oct 8 01:58:10 PDT 2015
Pushed.
> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Song, Ruiling
> Sent: Thursday, September 24, 2015 10:39
> To: Gong, Zhigang; beignet at lists.freedesktop.org
> Cc: Gong, Zhigang
> Subject: Re: [Beignet] [Patch v2] GBE: Don't try to remove instructions when
> liveness is in dynamic update phase.
>
> The previous patchset plus this one LGTM.
>
> Thanks!
> Ruiling
>
> > -----Original Message-----
> > From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf
> > Of Zhigang Gong
> > Sent: Thursday, September 24, 2015 9:15 AM
> > To: beignet at lists.freedesktop.org
> > Cc: Gong, Zhigang
> > Subject: [Beignet] [Patch v2] GBE: Don't try to remove instructions
> > when liveness is in dynamic update phase.
> >
> > As we want to avoid liveness update all the time, we maintain the
> > liveness information dynamically during the phi mov optimization.
> > Instruction(self-copy) remving bring unecessary complexity here. Let's
> > avoid do that here, and do the self-copy removing latter in removeMOVs().
> >
> > v2:
> > forgot to remove incorrect liveness checking for special registers.
> > Now remove them.
> >
> > Signed-off-by: Zhigang Gong <zhigang.gong at intel.com>
> > ---
> > backend/src/llvm/llvm_gen_backend.cpp | 21 +++++++--------------
> > 1 file changed, 7 insertions(+), 14 deletions(-)
> >
> > diff --git a/backend/src/llvm/llvm_gen_backend.cpp
> > b/backend/src/llvm/llvm_gen_backend.cpp
> > index b0b97e7..dc2e3e8 100644
> > --- a/backend/src/llvm/llvm_gen_backend.cpp
> > +++ b/backend/src/llvm/llvm_gen_backend.cpp
> > @@ -2149,6 +2149,11 @@ namespace gbe
> > // destinations)
> > uint32_t insnID = 2;
> > bb.foreach([&](ir::Instruction &insn) {
> > + if (insn.getOpcode() == ir::OP_MOV &&
> > + insn.getDst(0) == insn.getSrc(0)) {
> > + insn.remove();
> > + return;
> > + }
> > const uint32_t dstNum = insn.getDstNum();
> > const uint32_t srcNum = insn.getSrcNum();
> > for (uint32_t srcID = 0; srcID < srcNum; ++srcID) { @@ -2245,8
> > +2250,7 @@ namespace gbe
> > ++iter;
> > }
> > if (!phiPhiCopySrcInterfere) {
> > - // phiCopy source can be coaleased with phiCopy
> > - const_cast<Instruction *>(phiCopyDefInsn)->remove();
> > + replaceSrc(const_cast<Instruction *>(phiCopyDefInsn),
> > + phiCopySrc, phiCopy);
> >
> > for (auto &s : *phiCopySrcDef) {
> > const Instruction *phiSrcDefInsn =
> > s->getInstruction(); @@ -2300,7
> > +2304,7 @@ namespace gbe
> > // coalease phi and phiCopy
> > if (isOpt) {
> > for (auto &x : *phiDef) {
> > - const_cast<Instruction *>(x->getInstruction())->remove();
> > + replaceDst(const_cast<Instruction *>(x->getInstruction()),
> > + phi, phiCopy);
> > }
> > for (auto &x : *phiUse) {
> > const Instruction *phiUseInsn = x->getInstruction(); @@
> > -2361,21
> > +2365,11 @@ namespace gbe
> > const ir::UseSet *phiCopySrcUse = dag->getRegUse(phiCopySrc);
> > for (auto &s : *phiCopySrcDef) {
> > const Instruction *phiSrcDefInsn = s->getInstruction();
> > - if (phiSrcDefInsn->getOpcode() == ir::OP_MOV &&
> > - phiSrcDefInsn->getSrc(0) == phiCopy) {
> > - const_cast<Instruction *>(phiSrcDefInsn)->remove();
> > - continue;
> > - }
> > replaceDst(const_cast<Instruction *>(phiSrcDefInsn),
> > phiCopySrc, phiCopy);
> > }
> >
> > for (auto &s : *phiCopySrcUse) {
> > const Instruction *phiSrcUseInsn = s->getInstruction();
> > - if (phiSrcUseInsn->getOpcode() == ir::OP_MOV &&
> > - phiSrcUseInsn->getDst(0) == phiCopy) {
> > - const_cast<Instruction *>(phiSrcUseInsn)->remove();
> > - continue;
> > - }
> > replaceSrc(const_cast<Instruction *>(phiSrcUseInsn),
> > phiCopySrc, phiCopy);
> > }
> >
> > @@ -2405,7 +2399,6 @@ namespace gbe
> > } else
> > break;
> >
> > - break;
> > nextRedundant->clear();
> > replacedRegs.clear();
> > revReplacedRegs.clear();
> > --
> > 1.9.1
> >
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