[Beignet] [PATCH 0/5] curbe register allocation refactor and optimization

[Zhigang Gong]

This patch series is to fix the hacky curbe register allocation.
Before, we treat these registers totally different way to the other
normal registers. Then we do a lot of patch work in the backend stage
to handle curbe register firstly and even before interval computing,
thus we have to allocate some unecessary registers. And this also
introduce further overhead when preparing the payload values on
host side, for example for a 1D kernel, we may totally don't need
prepare LOCAL_IDY and LOCAL_IDZ, but previous implementation will
prepare them anyway.

This patchset normalize those curbe register with normal registers.
And gather information in the Gen IR stage as much as possible. Then
we only need very tiny patch work at backend stage, say insert the
image information offset and actually this part of patch work could
also be eliminated in the furture. And we could use complete liveness
information when do curbe payload register allocation. To put those
registers have closer end point together to reduce possible fragments.
And we eliminate all of those uncessary payload registers as much as
possible.

This patchset changed btiUtils and zero one as normal registers with
correct liveness information. At most cases, it can save one or two
registers.

This patch also fixed one longjmp issue. The previous method is too
inaccurate which is according basib block numbers.

This patch is a preparation of next patch set which is to further
optimize register allocation.


Zhigang Gong (5):
  GBE: refactor curbe register allocation.
  GBE: refine longjmp checking.
  GBE: don't treat btiUtil as a curbe payload register.
  GBE: don't always allocate ir::ocl::one/zero
  GBE: we no longer need to allocate register from two directions.

 backend/src/backend/context.cpp            |  14 ---
 backend/src/backend/context.hpp            |  20 +++-
 backend/src/backend/gen8_context.cpp       |  10 +-
 backend/src/backend/gen_context.cpp        | 175 +++++++++--------------------
 backend/src/backend/gen_context.hpp        |   6 +-
 backend/src/backend/gen_insn_selection.cpp | 158 +++++++++++++++-----------
 backend/src/backend/gen_reg_allocation.cpp | 127 ++++++++++++++-------
 backend/src/backend/gen_reg_allocation.hpp |   2 +
 backend/src/backend/program.h              |   6 +-
 backend/src/ir/context.cpp                 |   7 +-
 backend/src/ir/context.hpp                 |   3 +-
 backend/src/ir/function.hpp                |  36 +++++-
 backend/src/ir/image.cpp                   |   2 +-
 backend/src/ir/instruction.hpp             |   1 +
 backend/src/ir/profile.cpp                 |  62 +++++-----
 backend/src/ir/profile.hpp                 |  11 +-
 backend/src/ir/register.hpp                |  58 ++++++++--
 src/cl_command_queue.c                     |   4 +-
 src/cl_command_queue_gen7.c                |  34 +++---
 src/cl_kernel.c                            |  12 +-
 20 files changed, 419 insertions(+), 329 deletions(-)

-- 
1.9.1