[Beignet] [PATCH 3/8] Backend: Add gen8 instruction field for special accumulator.

[Matt Turner]

On Tue, Sep 15, 2015 at 4:15 AM,  <junyan.he at inbox.com> wrote:
> From: Junyan He <junyan.he at linux.intel.com>
>
> The madm and invm function need to set accumulator id in the
> instruction. On BDW, the write mask of the dst and channel
> mask of src are reinterpreted for acc2~acc9 selection.
>
> Signed-off-by: Junyan He <junyan.he at linux.intel.com>
> ---
>  backend/src/backend/gen8_instruction.hpp | 86 ++++++++++++++++++++++++++++++++
>  1 file changed, 86 insertions(+)
>
> diff --git a/backend/src/backend/gen8_instruction.hpp b/backend/src/backend/gen8_instruction.hpp
> index 5cf1032..2aa5bf7 100644
> --- a/backend/src/backend/gen8_instruction.hpp
> +++ b/backend/src/backend/gen8_instruction.hpp
> @@ -135,6 +135,22 @@ union Gen8NativeInstruction
>          uint32_t dest_address_mode:1;
>        } ia16;
>
> +      struct { // The sub reg field is reinterpreted as accumulator selector.
> +        uint32_t flag_sub_reg_nr:1;
> +        uint32_t flag_reg_nr:1;
> +        uint32_t mask_control:1;
> +        uint32_t dest_reg_file:2;
> +        uint32_t dest_reg_type:4;
> +        uint32_t src0_reg_file:2;
> +        uint32_t src0_reg_type:4;
> +        uint32_t pad:1;
> +        uint32_t dst_specal_acc:4;

s/specal/special/ throughout this patch.