[Beignet] [PATCH v2 1/3] fix bswap bug.

xionghu.luo at intel.com xionghu.luo at intel.com
Mon Sep 21 23:51:07 PDT 2015


From: Luo Xionghu <xionghu.luo at intel.com>

if the source is uniform and dst is non-uniform, no need to add the
indirect address index.

v2: missing a uniform check in gen8 context UD bswap.
Signed-off-by: Luo Xionghu <xionghu.luo at intel.com>
---
 backend/src/backend/gen8_context.cpp | 9 ++++++---
 backend/src/backend/gen_context.cpp  | 9 ++++++---
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/backend/src/backend/gen8_context.cpp b/backend/src/backend/gen8_context.cpp
index b497ee5..dd5b4ca 100644
--- a/backend/src/backend/gen8_context.cpp
+++ b/backend/src/backend/gen8_context.cpp
@@ -178,11 +178,13 @@ namespace gbe
               p->curr.noMask = 1;
               GenRegister ind_src = GenRegister::to_indirect1xN(GenRegister::retype(src, GEN_TYPE_UB), new_a0[0], 0);
               p->MOV(GenRegister::retype(tmp, GEN_TYPE_UB), ind_src);
-              ind_src.addr_imm += 16;
+              if(!uniform_src)
+                ind_src.addr_imm += 16;
               p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 0, 16), ind_src);
               if (simd == 16) {
                 for (int i = 0; i < 2; i++) {
-                  ind_src.addr_imm += 16;
+                  if(!uniform_src)
+                    ind_src.addr_imm += 16;
                   p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 1, 16*i), ind_src);
                 }
               }
@@ -237,7 +239,8 @@ namespace gbe
               GenRegister ind_src = GenRegister::to_indirect1xN(GenRegister::retype(src, GEN_TYPE_UB), new_a0[0], 0);
               p->MOV(GenRegister::retype(tmp, GEN_TYPE_UB), ind_src);
               if (simd == 16) {
-                ind_src.addr_imm += 16;
+                if(!uniform_src)
+                  ind_src.addr_imm += 16;
                 p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 0, 16), ind_src);
               }
               p->pop();
diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index e16b0a9..8ee65ee 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -384,12 +384,14 @@ namespace gbe
             GenRegister ind_src = GenRegister::to_indirect1xN(GenRegister::retype(src, GEN_TYPE_UB), new_a0[0], 0);
             p->MOV(GenRegister::retype(tmp, GEN_TYPE_UB), ind_src);
             for (int i = 1; i < 4; i++) {
-              ind_src.addr_imm += 8;
+              if (!uniform_src)
+                ind_src.addr_imm += 8;
               p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 0, 8*i), ind_src);
             }
             if (simd == 16) {
               for (int i = 0; i < 4; i++) {
-                ind_src.addr_imm += 8;
+                if (!uniform_src)
+                  ind_src.addr_imm += 8;
                 p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 1, 8*i), ind_src);
               }
             }
@@ -428,7 +430,8 @@ namespace gbe
             GenRegister ind_src = GenRegister::to_indirect1xN(GenRegister::retype(src, GEN_TYPE_UB), new_a0[0], 0);
             p->MOV(GenRegister::retype(tmp, GEN_TYPE_UB), ind_src);
             for (int i = 1; i < (simd == 8 ? 2 : 4); i++) {
-              ind_src.addr_imm += 8;
+              if (!uniform_src)
+                ind_src.addr_imm += 8;
               p->MOV(GenRegister::offset(GenRegister::retype(tmp, GEN_TYPE_UB), 0, 8*i), ind_src);
             }
             p->pop();
-- 
1.9.1



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