[Beignet] [PATCH V2 2/2] write mask in disassembly not parse correctly.
Yang, Rong R
rong.r.yang at intel.com
Fri Apr 29 02:06:30 UTC 2016
The patchset pushed, thanks.
> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Guo, Yejun
> Sent: Thursday, April 28, 2016 10:00
> To: Luo, Xionghu <xionghu.luo at intel.com>; beignet at lists.freedesktop.org
> Cc: Luo, Xionghu <xionghu.luo at intel.com>
> Subject: Re: [Beignet] [PATCH V2 2/2] write mask in disassembly not parse
> correctly.
>
> LGTM, thanks.
>
> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> xionghu.luo at intel.com
> Sent: Thursday, April 28, 2016 5:56 PM
> To: beignet at lists.freedesktop.org
> Cc: Luo, Xionghu
> Subject: [Beignet] [PATCH V2 2/2] write mask in disassembly not parse
> correctly.
>
> From: Luo Xionghu <xionghu.luo at intel.com>
>
> v2: don't show write mask when full channel; split patch.
>
> Signed-off-by: Luo Xionghu <xionghu.luo at intel.com>
> ---
> backend/src/backend/gen/gen_mesa_disasm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/backend/src/backend/gen/gen_mesa_disasm.c
> b/backend/src/backend/gen/gen_mesa_disasm.c
> index 26393f4..067ddd8 100644
> --- a/backend/src/backend/gen/gen_mesa_disasm.c
> +++ b/backend/src/backend/gen/gen_mesa_disasm.c
> @@ -781,7 +781,7 @@ static int dest_3src(FILE *file, const void *inst)
> if (is_special_acc(inst)) {
> err |= control(file, "specialacc", special_acc, ((const union
> Gen8NativeInstruction *)inst)->bits1.da3srcacc.dst_special_acc, NULL);
> } else {
> - err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst,
> bits1.da16.dest_writemask), NULL);
> + err |= control(file, "writemask", writemask, GEN_BITS_FIELD(inst,
> bits1.da3src.dest_writemask), NULL);
> }
>
> if (gen_version < 80) {
> --
> 2.1.4
>
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