[Beignet] [PATCH] Backend: Fix printf bug for simd8

[Xiuli Pan]

From: Pan Xiuli <xiuli.pan at intel.com>

The tmp0 and tmp1 for simd8 should be half size of the simd16 mode.
Otherwise the send message will use wrong reg and wrong message length.

Signed-off-by: Pan Xiuli <xiuli.pan at intel.com>
---
 backend/src/backend/gen_context.cpp        | 3 ++-
 backend/src/backend/gen_insn_selection.cpp | 9 ++-------
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index b429ec3..f1c58eb 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -3411,13 +3411,14 @@ namespace gbe
   void GenContext::emitPrintfInstruction(const SelectionInstruction &insn) {
     const GenRegister dst = ra->genReg(insn.dst(0));
     const GenRegister tmp0 = ra->genReg(insn.dst(1));
+    const GenRegister tmp1 = ra->genReg(insn.dst(2));
     GenRegister src;
     uint32_t srcNum = insn.srcNum;
     if (insn.extra.continueFlag)
       srcNum--;
 
     GenRegister addr = GenRegister::retype(tmp0, GEN_TYPE_UD);
-    GenRegister data = GenRegister::offset(addr, 2);
+    GenRegister data = GenRegister::retype(tmp1, GEN_TYPE_UD);
 
     if (!insn.extra.continueFlag) {
       p->push(); {
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index 6cfa87f..c4e2934 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -6166,13 +6166,8 @@ extern bool OCL_DEBUGINFO; // first defined by calling BVAR in program.cpp
       uint32_t totalSize = 0;
       bool isContinue = false;
       GBE_ASSERT(sel.ctx.getSimdWidth() == 16 || sel.ctx.getSimdWidth() == 8);
-      if (sel.ctx.getSimdWidth() == 16) {
-        tmp0 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_DWORD)), GEN_TYPE_UD);
-        tmp1 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_DWORD)), GEN_TYPE_UD);
-      } else {
-        tmp0 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_QWORD)), GEN_TYPE_UD);
-        tmp1 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_QWORD)), GEN_TYPE_UD);
-      }
+      tmp0 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_DWORD)), GEN_TYPE_UD);
+      tmp1 = GenRegister::retype(sel.selReg(sel.reg(FAMILY_DWORD)), GEN_TYPE_UD);
 
       /* Get the total size for one printf statement. */
       for (i = 0; i < srcNum; i++) {
-- 
2.7.4