[Beignet] [PATCH] Backend: Fix image block write bug in simd8

[Xiuli Pan]

From: Pan Xiuli <xiuli.pan at intel.com>

The dst type for massage move is not set to UD for expect, use tmp
register with retype for the expected type.

Signed-off-by: Pan Xiuli <xiuli.pan at intel.com>
---
 backend/src/backend/gen_context.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index 8802efc..bc63766 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -3768,7 +3768,7 @@ namespace gbe
         p->curr.execWidth = 8;
         // Mov what we need into msgs
         for(uint32_t i = 0; i < vec_size; i++)
-          p->MOV(ra->genReg(insn.dst(1 + i)), ra->genReg(insn.src(2 + i)));
+          p->MOV(GenRegister::offset(header, 1 + i), ra->genReg(insn.src(2 + i)));
         // Now read the data
         p->MBWRITE(header, insn.getbti(), vec_size);
       p->pop();
-- 
2.5.0