[Beignet] [PATCH 2/4] Backend: Refine sel ir optimization
Xiuli Pan
xiuli.pan at intel.com
Fri Jun 3 02:43:47 UTC 2016
From: Pan Xiuli <xiuli.pan at intel.com>
We may have some inst like:
mov %30, %3
(-f0.1) mov %30, %4
(+f0.1) mov %30, %5
to mask some value out with the flag.
Now only the last mov will left after optimization.
This patch add check about if the intemedia can be replaced even if they
are in the same prediction state and inverse prediction state.
Also refine the check of prediction state to propoly handle situation:
(-f0.1) infoinst %30, %4
inst %30, %8
Signed-off-by: Pan Xiuli <xiuli.pan at intel.com>
---
backend/src/backend/gen_insn_selection_optimize.cpp | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/backend/src/backend/gen_insn_selection_optimize.cpp b/backend/src/backend/gen_insn_selection_optimize.cpp
index 35da404..b8aa776 100644
--- a/backend/src/backend/gen_insn_selection_optimize.cpp
+++ b/backend/src/backend/gen_insn_selection_optimize.cpp
@@ -97,7 +97,7 @@ namespace gbe
void doLocalCopyPropagation();
void addToReplaceInfoMap(SelectionInstruction& insn);
void changeInsideReplaceInfoMap(const SelectionInstruction& insn, GenRegister& var);
- void removeFromReplaceInfoMap(const GenRegister& var);
+ void removeFromReplaceInfoMap(const SelectionInstruction& insn, const GenRegister& var);
void doReplacement(ReplaceInfo* info);
bool CanBeReplaced(const ReplaceInfo* info, const SelectionInstruction& insn, const GenRegister& var);
void cleanReplaceInfoMap();
@@ -127,14 +127,15 @@ namespace gbe
replaceInfoMap.clear();
}
- void SelBasicBlockOptimizer::removeFromReplaceInfoMap(const GenRegister& var)
+ void SelBasicBlockOptimizer::removeFromReplaceInfoMap(const SelectionInstruction& insn, const GenRegister& var)
{
for (ReplaceInfoMap::iterator pos = replaceInfoMap.begin(); pos != replaceInfoMap.end(); ++pos) {
ReplaceInfo* info = pos->second;
if (info->intermedia.reg() == var.reg()) { //intermedia is overwritten
if (info->intermedia.quarter == var.quarter && info->intermedia.subnr == var.subnr) {
- //the whole intermedia is overwritten, so, do replacement for the scanned IRs
- doReplacement(info);
+ // We need to check the if intermedia is fully overwritten, they may be in some prediction state.
+ if (CanBeReplaced(info, insn, var))
+ doReplacement(info);
}
replaceInfoMap.erase(pos);
delete info;
@@ -199,7 +200,11 @@ namespace gbe
if (info->insn.state.noMask == 0 && insn.state.noMask == 1)
return false;
- if (info->insn.state.predicate != insn.state.predicate && info->insn.state.predicate != GEN_PREDICATE_NONE)
+ // If insn is in no prediction state, it will overwrite the info insn.
+ if (info->insn.state.predicate != insn.state.predicate && insn.state.predicate != GEN_PREDICATE_NONE)
+ return false;
+
+ if (info->insn.state.inversePredicate != insn.state.inversePredicate)
return false;
if (info->intermedia.type == var.type && info->intermedia.quarter == var.quarter && info->intermedia.subnr == var.subnr) {
@@ -235,7 +240,7 @@ namespace gbe
changeInsideReplaceInfoMap(insn, insn.src(i));
for (uint8_t i = 0; i < insn.dstNum; ++i)
- removeFromReplaceInfoMap(insn.dst(i));
+ removeFromReplaceInfoMap(insn, insn.dst(i));
if (insn.opcode == SEL_OP_MOV)
addToReplaceInfoMap(insn);
--
2.7.4
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