[Beignet] [PATCH 7/8] [OCL20] address bits change to 64.

[xionghu.luo at intel.com]

From: Luo Xionghu <xionghu.luo at intel.com>

---
 src/cl_gt_device.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/cl_gt_device.h b/src/cl_gt_device.h
index cf48b6d..5becab8 100644
--- a/src/cl_gt_device.h
+++ b/src/cl_gt_device.h
@@ -40,7 +40,7 @@
 .native_vector_width_double = 2,
 .native_vector_width_half = 8,
 .preferred_wg_sz_mul = 16,
-.address_bits = 32,
+.address_bits = 64,
 .svm_capabilities = CL_DEVICE_SVM_COARSE_GRAIN_BUFFER,
 .image_support = CL_TRUE,
 .max_read_image_args = BTI_MAX_READ_IMAGE_ARGS,
-- 
2.1.4